Memory performance evaluation using address mapping information
US-2024394164-A1 · Nov 28, 2024 · US
US9104546B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9104546-B2 |
| Application number | US-201113014735-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jan 27, 2011 |
| Priority date | May 24, 2010 |
| Publication date | Aug 11, 2015 |
| Grant date | Aug 11, 2015 |
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A method for performing block management is provided. The method is applied to a controller of a Flash memory, where the Flash memory includes a plurality of blocks. The method includes: adjusting a dynamic threshold according to at least one condition; and comparing a valid/invalid page count of a specific block of the plurality of blocks with the dynamic threshold to determine whether to erase the specific block. An associated memory device and a controller thereof are also provided, where the memory device includes the Flash memory and the controller. In particular, the controller includes a read only memory (ROM) arranged to store a program code, and further includes a microprocessor arranged to execute the program code to control access to the Flash memory and manage the plurality of blocks, where under control of the microprocessor, the controller operates according to the method.
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What is claimed is: 1. A method for performing block management, the method being applied to a controller of a Flash memory, the Flash memory comprising a plurality of blocks, the method comprising: adjusting a dynamic threshold according to at least one condition; and comparing a valid or invalid page count of a specific block of the plurality of blocks with the dynamic threshold to determine whether to erase the specific block. 2. The method of claim 1 ,…
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
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Physics · mapped topic
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