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US-2024422006-A1 · Dec 19, 2024 · US
Flash memory apparatus with serial interface and reset method thereof
US9104401B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9104401-B2 |
| Application number | US-201414529167-A |
| Country | US |
| Kind code | B2 |
| Filing date | Oct 31, 2014 |
| Priority date | Feb 24, 2011 |
| Publication date | Aug 11, 2015 |
| Grant date | Aug 11, 2015 |
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Abstract
Official abstract text for this publication.
A flash memory apparatus with serial interface is disclosed. The flash memory apparatus includes a command receiver, a command decoder and a core circuit. The command receiver sequentially receives a plurality of command data through the data input pin and the clock pin. The command decoder receives a command sequence formed by the command data, and compares the command sequence with a reference sequence to generate a reset signal. The core circuit receives the reset signal to activate a reset operation according to the reset signal.
First claim
Opening claim text (preview).
What is claimed is: 1. A flash memory apparatus with a serial interface, comprising: a command receiver, coupled to a clock pin and a data input pin of the flash memory apparatus, and sequentially receiving a plurality of command data through the data input pin and the clock pin; a command decoder, coupled to the command receiver, receiving a command sequence which comprises a first command data and a second command data, and comparing the command sequence with a reference seque…
Assignees
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Classifications
Physics · mapped topic
- G06F9/30043Primary
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
- G11C16/20Primary
Physics · mapped topic
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Frequently asked questions
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- What does patent US9104401B2 cover?
- A flash memory apparatus with serial interface is disclosed. The flash memory apparatus includes a command receiver, a command decoder and a core circuit. The command receiver sequentially receives a plurality of command data through the data input pin and the clock pin. The command decoder receives a command sequence formed by the command data, and compares the command sequence with a referenc…
- Who is the assignee on this patent?
- Winbond Electronics Corp
- What technology area does this patent fall under?
- Primary CPC classification G06F9/30043. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Aug 11 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).