Semiconductor structure with flush shallow trench isolation and gate oxide and method of manufacturing the same
US-2024395883-A1 · Nov 28, 2024 · US
Semiconductor device and method of manufacturing the same
US9099552B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9099552-B2 |
| Application number | US-201414187871-A |
| Country | US |
| Kind code | B2 |
| Filing date | Feb 24, 2014 |
| Priority date | Nov 24, 2010 |
| Publication date | Aug 4, 2015 |
| Grant date | Aug 4, 2015 |
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- Title
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Abstract
Official abstract text for this publication.
The invention provides an LDMOS transistor of which the time-dependent degrading of the performance due to the trapping of hot electrons in the gate insulation film is decreased. A body layer is disposed in a surface portion of an N− type semiconductor layer. A source layer including an N− type layer is disposed in a surface portion of the body layer. An N− type drift layer is formed in a surface portion of the N− type semiconductor layer. This drift layer includes a first region having a first N type impurity concentration peak region and a second region having a second N type impurity concentration peak region that is positioned deeper than the first N type impurity concentration peak region, the second region adjoining this first region. An N+ type drain layer is formed in a surface portion of the second region.
First claim
Opening claim text (preview).
What is claimed is: 1. A semiconductor device comprising: a semiconductor substrate of a first general conductivity type; a semiconductor layer of a second general conductivity type on the semiconductor substrate; a body layer of the first general conductivity type in a surface portion of the semiconductor layer; a source layer of the second general conductivity type in a surface portion of the body layer; a drift layer of the second general conductivity type in a surface…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US9099552B2 cover?
- The invention provides an LDMOS transistor of which the time-dependent degrading of the performance due to the trapping of hot electrons in the gate insulation film is decreased. A body layer is disposed in a surface portion of an N− type semiconductor layer. A source layer including an N− type layer is disposed in a surface portion of the body layer. An N− type drift layer is formed in a surfa…
- Who is the assignee on this patent?
- Semiconductor Components Ind
- What technology area does this patent fall under?
- Primary CPC classification H10D30/65. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Aug 04 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).