Self-aligned structures and methods for asymmetric GaN transistors and enhancement mode operation

US9099490B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9099490-B2
Application numberUS-201213631534-A
CountryUS
Kind codeB2
Filing dateSep 28, 2012
Priority dateSep 28, 2012
Publication dateAug 4, 2015
Grant dateAug 4, 2015

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Abstract

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Embodiments include high electron mobility transistors (HEMT). In embodiments, a gate electrode is spaced apart by different distances from a source and drain semiconductor region to provide high breakdown voltage and low on-state resistance. In embodiments, self-alignment techniques are applied to form a dielectric liner in trenches and over an intervening mandrel to independently define a gate length, gate-source length, and gate-drain length with a single masking operation. In embodiments, III-N HEMTs include fluorine doped semiconductor barrier layers for threshold voltage tuning and/or enhancement mode operation.

First claim

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What is claimed is: 1. A high electron mobility field effect transistor (HEMT), comprising: a group III-N semiconductor channel layer disposed over a substrate; a gate stack disposed over a first region of the channel layer; a source region in contact with the channel layer on a first side of the gate stack; a drain region in contact with the channel layer on a second side of the gate stack opposite the source region; a dielectric liner disposed over a first length of a se…

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What does patent US9099490B2 cover?
Embodiments include high electron mobility transistors (HEMT). In embodiments, a gate electrode is spaced apart by different distances from a source and drain semiconductor region to provide high breakdown voltage and low on-state resistance. In embodiments, self-alignment techniques are applied to form a dielectric liner in trenches and over an intervening mandrel to independently define a gat…
Who is the assignee on this patent?
Dasgupta Sansaptak, Then Han Wui, Radosavljevic Marko, and 7 more
What technology area does this patent fall under?
Primary CPC classification H10D62/151. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 04 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).