Chip packaging method, chip packaging module, and embedded substrate chip packaging structure
US-2024413138-A1 · Dec 12, 2024 · US
Fabrication of self aligned base contacts for bipolar transistors
US9099397B1 · US · B1
| Field | Value |
|---|---|
| Publication number | US-9099397-B1 |
| Application number | US-201213427097-A |
| Country | US |
| Kind code | B1 |
| Filing date | Mar 22, 2012 |
| Priority date | Mar 22, 2012 |
| Publication date | Aug 4, 2015 |
| Grant date | Aug 4, 2015 |
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Abstract
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A transistor includes a first emitter layer area, a second emitter layer area, wherein the second emitter layer area is separate from the first emitter layer area, a first metal formed on the first emitter layer area, a second metal formed on the second emitter layer area, a base, and a base metal formed on the base and on the second metal. The first emitter layer area is an emitter of the transistor and the first metal provides an emitter contact. The base metal on the base and on the second metal provides a base contact.
First claim
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What is claimed is: 1. A method of forming a self aligned base contact for a transistor, the method comprising: forming a collector layer on a substrate; forming a base layer on the collector layer; forming an emitter layer on the base layer; forming a first metal on a first emitter area of the emitter layer of the transistor; forming a second metal on a second emitter area of the emitter layer of the transistor, wherein the first metal and the second metal are not in dire…
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Frequently asked questions
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- What does patent US9099397B1 cover?
- A transistor includes a first emitter layer area, a second emitter layer area, wherein the second emitter layer area is separate from the first emitter layer area, a first metal formed on the first emitter layer area, a second metal formed on the second emitter layer area, a base, and a base metal formed on the base and on the second metal. The first emitter layer area is an emitter of the tran…
- Who is the assignee on this patent?
- Li James Chingwei, Hrl Lab Llc
- What technology area does this patent fall under?
- Primary CPC classification H10P50/00. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Aug 04 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B1). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).