Semiconductor device and method of manufacturing the same
US-2024290791-A1 · Aug 29, 2024 · US
US9099323B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9099323-B2 |
| Application number | US-201113244054-A |
| Country | US |
| Kind code | B2 |
| Filing date | Sep 23, 2011 |
| Priority date | Jun 9, 2011 |
| Publication date | Aug 4, 2015 |
| Grant date | Aug 4, 2015 |
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Official abstract text for this publication.
A Si-on-half-insulator device and its manufacturing method are disclosed in this invention. In one embodiment, a horizontal insulating layer located below at least one of the source and drain regions is realized to reduce junction capacitance. In another embodiment, a horizontal insulating layer located below at least one of the source and drain regions and a vertical insulating layer located below at least one side surface of the gate are realized. The additional vertical insulating layer can reduce punch leakage. Further, a method of manufacturing the above semiconductor device is also disclosed, wherein the horizontal and vertical insulating layers are formed using an additional layer of epitaxially grown semiconductor material and isolating trenches.
Opening claim text (preview).
The invention claimed is: 1. A method of manufacturing semiconductor device, comprising the following steps: providing a substrate of a first semiconductor material, forming a protrusion with an expected height on the substrate, and providing a cap-shaped mask covering the top and sidewalls of the protrusion; growing a layer of second semiconductor material on the surfaces of the substrate at opposite sides of the protrusion; removing a portion of the cap-shaped mask to expose…
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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