Embedded package and method of manufacturing the same

Patent metadata

Field	Value
Publication number	US-9099313-B2
Application number	US-201313846807-A
Country	US
Kind code	B2
Filing date	Mar 18, 2013
Priority date	Dec 18, 2012
Publication date	Aug 4, 2015
Grant date	Aug 4, 2015

Abstract

An embedded package in which active elements, such as semiconductor chips, are embedded within a package substrate. The semiconductor chips, embedded within a dielectric layer, are coupled with circuit wires to ensure electrical and signal continuity. When connections between the semiconductor chip and the package substrate are performed in different directions, there is a reduction in overall interconnection area, connection reliability is improved, leakage currents are reduced, and higher device yields can be realized.

First claim

What is claimed is:

1. An embedded package, comprising:
a package substrate having a core having a first circuit wire pattern and a second circuit wire pattern formed on outer surfaces of the core, wherein the first circuit wire pattern formed on a first surface of the core and the second circuit wire pattern formed on a second surface that opposes the first surface of the core;
a semiconductor chip formed on the first surface of the core of the package substrate;
first and se…

Assignees

• Sk Hynix Inc

Inventors

• Lee Sang Yong
• Kim Si Han

Classifications

• H05K1/185

  Electricity · mapped topic

• H05K3/12

  Electricity · mapped topic

• H05K3/18

  Electricity · mapped topic

• H05K3/4644

  Electricity · mapped topic

• H10W99/00

  Electricity · mapped topic