Method and system for accelerating collision resolution on a reconfigurable processor

US9098917B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9098917-B2
Application numberUS-201313916884-A
CountryUS
Kind codeB2
Filing dateJun 13, 2013
Priority dateJul 19, 2012
Publication dateAug 4, 2015
Grant dateAug 4, 2015

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Abstract

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A method and system for accelerating collision resolution of 3D physics engine on a reconfigurable processor allows the collision resolution module to utilize the immense parallelism available in Coarse Grained Array (CGA) of reconfigurable processor based on ADRES. The method of rescheduling and dividing the collision pairs is performed for accelerating the collision resolution. The method obtains the colliding pairs in the original order of processing from the objects that are under simulation. Then the method starts reordering the collision pairs for removing the dependency between the successive collision pairs. The independent collision pairs obtained from the original colliding pairs are grouped together. The dependent collision pairs are extracted and grouped together. The independent collision pairs are processed in CGA mode by utilizing the loop level parallelism, whereas the dependent collision pairs are processed in VLIW mode.

First claim

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What is claimed is: 1. A apparatus for accelerating collision resolution on a Reconfigurable Processor (RP), An apparatus comprising: a processor; a reconfigurable processor; a memory module; and a graphics processing unit, wherein the processor reschedules colliding pairs from objects to remove dependency among the colliding pairs; and divides the colliding pairs for processing in at least one of a Coarse Grained Array (CGA) mode and a Very Long Instruction Word (VLIW)…

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What does patent US9098917B2 cover?
A method and system for accelerating collision resolution of 3D physics engine on a reconfigurable processor allows the collision resolution module to utilize the immense parallelism available in Coarse Grained Array (CGA) of reconfigurable processor based on ADRES. The method of rescheduling and dividing the collision pairs is performed for accelerating the collision resolution. The method obt…
Who is the assignee on this patent?
Samsung Electronics Co Ltd
What technology area does this patent fall under?
Primary CPC classification G06T1/20. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Aug 04 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).