Switching mode power supply and the method thereof

Patent metadata

Field	Value
Publication number	US-9093909-B2
Application number	US-201313889286-A
Country	US
Kind code	B2
Filing date	May 7, 2013
Priority date	May 8, 2012
Publication date	Jul 28, 2015
Grant date	Jul 28, 2015

Abstract

A switching mode power supply, having: an input port; an output port; an energy storage component and a pair of power switches coupled between input port and the output port; an error amplifier configured to generate an amplified error signal based on the feedback signal and the reference signal; an error comparator configured to generate a frequency control signal based on the amplified error signal and the first sawtooth signal; a peak current generator configured to generate a peak current signal based on the frequency control signal; a peak current comparator configured to generate a current limit signal based on the peak current signal and the current sense signal; and a logic circuit configured to generate a switching signal to control the power switches based on the frequency control signal and the current limit signal.

First claim

We claim:

1. A switching mode power supply, comprising: an input port configured to receive an input voltage; an output port configured to provide an output voltage to a load; an energy storage component and a power switches coupled between the input port and the output port;
an error amplifier having a first input terminal configured to receive a feedback signal indicative of the output voltage, a second input terminal configured to receive a reference signal, and an output terminal configured to generate an amplified error signal based on the feedback signal and the reference signal;
an error comparator having a first input terminal configured to receive the amplified error signal, a second input terminal configured to receive a first sawtooth signal, and an output terminal configured to generate a frequency control signal based on the amplified error signal and the first sawtooth signal;
a peak current generator having an input terminal coupled to the output terminal of the error comparator to receive the frequency control signal, and an output terminal configured to generate a peak current signal based on the frequency control signal,
wherein the value of the peak current signal is varying with a switching frequency of the switching mode power supply;
a peak current comparator having a first input terminal coupled to the output terminal of the peak current generator to receive the peak current signal, a second input terminal configured to receive a current sense signal indicative of a current flowing through the energy storage component, and an output terminal configured to generate a current limit signal based on the peak current signal and the current sense signal; and
a logic circuit having a first input terminal coupled to the output terminal of the error comparator to receive the frequency control signal, a second input terminal coupled to the output terminal of the peak current comparator to receive the current limit signal, an output terminal configured to generate a switching signal to control the power switches based on the frequency control signal and the current limit signal, and
an oscillator configured to generate a clock signal with a fixed frequency; a selector having a first input terminal coupled to the output terminal of the error comparator to receive the frequency control signal, a second input terminal coupled to the oscillator to receive the clock signal, and an output terminal configured to select the lower frequency value of between the frequency control signal and the clock signal; a RS flip-flop having a set terminal coupled to the output terminal of the selector, a reset terminal coupled to the output terminal of the peak current comparator to receive the current limit signal, and an output terminal configured to generate the switching signal based on the output signal of the selector and the current limit signal.

2. The switching mode power supply of claim 1 , wherein the logic circuit comprises:
a RS flip-flop having a set terminal configured to receive the frequency control signal, a reset terminal configured to receive the current limit signal, and an output terminal configured to generate the switching signal based on the frequency control signal and the current limit signal.

3. The switching mode power supply of claim 1 , wherein:
when the switching frequency is higher than a first frequency threshold, the peak current signal decreases from a maximum value as the decrease of the switching frequency;
when the switching frequency is between the first frequency threshold and a second frequency threshold, the peak current signal is fixed to a middle value;
when the switching frequency is between the second frequency threshold and a third frequency threshold, the peak current signal decreases from the middle value as the decrease of the switching frequency; and
when the switching frequency is lower than the third frequency threshold, the peak current signal is fixed to a minimum value;
wherein the maximum value is larger than the middle value and the middle value is larger than the minimum value.

4. A switching mode power supply, comprising: an input port configured to receive an input voltage; an output port configured to provide an output voltage to a load; an energy storage component and a power switches coupled between the input port and the output port; an error amplifier having a first input terminal configured to receive a feedback signal indicative of the output voltage, a second input terminal configured to receive a reference signal, and an output terminal configured to generate an amplified error signal based on the feedback signal and the reference signal;
an error comparator having a first input terminal configured to receive the amplified error signal, a second input terminal configured to receive a first sawtooth signal, and an output terminal configured to generate a frequency control signal based on the amplified error signal and the first sawtooth signal;
a peak current generator having an input terminal coupled to the output terminal of the error comparator to receive the frequency control signal, and an output terminal configured to generate a peak current signal based on the frequency control signal,
wherein the value of the peak current signal is varying with a switching frequency of the switching mode power supply;
a peak current comparator having a first input terminal coupled to the output terminal of the peak current generator to receive the peak current signal, a second input terminal configured to receive a current sense signal indicative of a current flowing through the energy storage component, and an output terminal configured to generate a current limit signal based on the peak current signal and the current sense signal; and
a logic circuit having a first input terminal coupled to the output terminal of the error comparator to receive the frequency control signal, a second input terminal coupled to the output terminal of the peak current comparator to receive the current limit signal, and an output terminal configured to generate a switching signal to control the power switches based on the frequency control signal and the current limit signal;
wherein the peak current generator comprises:
a timing circuit having an input terminal configured to receive the frequency control signal, and an output terminal configured to generate a timing control signal based on the frequency control signal;
a first switch having a first terminal coupled to a voltage source having a value equal to the maximum value of the peak current signal, a control terminal configured to receive the frequency control signal, and a second terminal;
a second switch having a first terminal coupled to the second terminal of the first switch, a control terminal coupled to the timing circuit to receive the timing control signal, and a second terminal; and
a third switch having a first terminal coupled to the second terminal of the second switch, a second terminal coupled to a voltage source having a value equal to the minimum voltage value of the peak current signal;
a first capacitor having a first terminal coupled to the connection node of the first switch and the second switch, and a second terminal coupled to a ground reference node, wherein the peak current signal is provided at the first terminal of the capacitor; and
a first current source having a first terminal coupled to the connection node of the second switch and the third switch, and a second terminal coupled to the ground reference node.

5. The switching mode power supply of claim 4 , wherein the timing circuit comprises:
a first timing unit, a second timing unit, an OR gate and a RS flip-flop, wherein the first timing unit configured to receive the frequency control signal, and to generate a first timing sign

Assignees

• Chengdu Monolithic Power Sys

Inventors

• Wang Siran
• Zhang Junming
• Ren Yuancheng

Classifications

• H02M3/33507 Primary

  with automatic control of the output voltage or current, e.g. flyback converters (H02M3/33561, H02M3/33569 take precedence) · CPC title

• H02M3/33515 Primary

  with digital control · CPC title

• H02M3/33523

  with galvanic isolation between input and output of both the power stage and the feedback loop · CPC title