Implementing enhanced low loss, thin, high performance flexible circuits

US9089071B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9089071-B2
Application numberUS-201213535792-A
CountryUS
Kind codeB2
Filing dateJun 28, 2012
Priority dateJun 28, 2012
Publication dateJul 21, 2015
Grant dateJul 21, 2015

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method, system and computer program product are provided for implementing enhanced low loss, thin, high performance flexible circuits. A plurality of predefined values including predefined layout, spacing and density of conductor, signal trace construct, shape and feature values are provided for each signal layer in a flexible circuit. Volumetric calculations are performed using the predefined values for each signal layer in the flexible circuit and a respective adjacent adhesive layer is characterized for each signal layer providing a respective optimized adjacent adhesive layer.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for implementing enhanced low loss, thin, high performance flexible circuits performed by a processor, said method comprising: said processor performing the steps of: receiving a plurality of predefined values including predefined layout, spacing and density of conductor, signal trace construct, shape and feature values for each signal layer in a flexible circuit; performing volumetric calculations using the predefined values for each signal layer in the flexible circuit; and responsive to said volumetric calculations, characterizing a respective adjacent adhesive layer for each signal layer providing an optimized adjacent adhesive layer; and wherein characterizing said respective adjacent adhesive layer for each signal layer providing said optimized adjacent adhesive layer includes strategically reducing an amount of adhesive residing within a signal trace geometry cross section and providing an increased thickness of an electrical insulator polyimide layer having a lower dissipation and dielectric properties, lower coefficient of thermal expansion (CTE), providing a reduced overall cross sectional thickness for the flexible circuit. 2. The method as recited in claim 1 wherein characterizing said respective adjacent adhesive layer for each signal layer providing said optimized adjacent adhesive layer includes characterizing said respective adjacent adhesive layer for forming at least one predefined aperture pattern in said respective adjacent adhesive layer. 3. The method as recited in claim 1 wherein characterizing said respective adjacent adhesive layer for each signal layer providing said optimized adjacent adhesive layer includes adding characterized adhesive fill to an adjacent signal layer or said respective adjacent adhesive layer. 4. The method as recited in claim 1 wherein characterizing said respective adjacent adhesive layer for each signal layer providing said optimized adjacent adhesive layer includes adding characterized adhesive fill to a selected connector area of an adjacent signal layer. 5. The method as recited in claim 1 wherein characterizing said respective adjacent adhesive layer for each signal layer providing said optimized adjacent adhesive layer includes characterizing said respective adjacent adhesive layer to modify a cross section in a critical bend area to enhance mechanical performance. 6. The method as recited in claim 1 wherein characterizing said respective adjacent adhesive layer for each signal layer providing said optimized adjacent adhesive layer includes characterizing said respective adjacent adhesive layer for selectively reducing a thickness at multiple areas of said respective optimized adjacent adhesive layer to a minimum predefined adhesive compensating for circuit density and copper thickness values. 7. The method as recited in claim 1 wherein characterizing said respective adjacent adhesive layer for each signal layer providing said optimized adjacent adhesive layer includes characterizing said respective adjacent adhesive layer for minimizing a thickness of said respective optimized adjacent adhesive layer providing enhanced thermal expansion for the flexible circuit. 8. The method as recited in claim 1 includes providing an electrical insulator polyimide layer with said respective optimized adjacent adhesive layer, and increasing a thickness of said electrical insulator polyimide layer with a decrease in a thickness of said respective optimized adjacent adhesive layer. 9. A system for implementing enhanced low loss, thin, high performance flexible circuits comprising: a processor, a flexible circuit design program tangibly embodied in a non-transitory machine readable medium used in the flexible circuit design process, said flexible circuit design program including an adhesive control program, and said processor using said adhesive control program, receiving a plurality of predefined values including predefined layout, spacing and density of conductor, signal trace construct, shape and feature values for each signal layer in a flexible circuit; said processor performing volumetric calculations using the predefined values for each signal layer in the flexible circuit; and said processor responsive to said volumetric calculations, characterizing a respective adjacent adhesive layer for each signal layer providing an optimized adjacent adhesive layer; wherein said processor responsive to said volumetric calculations, characterizing a respective adjacent adhesive layer for each signal layer providing an optimized adjacent adhesive layer includes said processor strategically reducing an amount of adhesive residing within a signal trace geometry cross section and providing an increased thickness of an electrical insulator polyimide layer having a lower dissipation and dielectric properties, lower coefficient of thermal expansion (CTE), providing a reduced overall cross sectional thickness for the flexible circuit. 10. The system as recited in claim 9 wherein said processor responsive to said volumetric calculations, characterizing a respective adjacent adhesive layer for each signal layer providing an optimized adjacent adhesive layer includes said processor characterizing said respective adjacent adhesive layer for forming at least one predefined aperture pattern in said respective adjacent adhesive layer. 11. The system as recited in claim 9 wherein said processor responsive to said volumetric calculations, characterizing a respective adjacent adhesive layer for each signal layer providing an optimized adjacent adhesive layer includes said processor characterizing said respective adjacent adhesive layer for selectively reducing a thickness at multiple areas of said respective optimized adjacent adhesive layer to a minimum predefined adhesive compensating for circuit density and copper thickness values. 12. The system as recited in claim 9 wherein said processor responsive to said volumetric calculations, characterizing a respective adjacent adhesive layer for each signal layer providing an optimized adjacent adhesive layer includes said processor characterizing said respective adjacent adhesive layer for minimizing a thickness of said respective optimized adjacent adhesive layer providing enhanced thermal expansion for the flexible circuit. 13. The system as recited in claim 9 includes said processor providing an electrical insulator polyimide layer with said respective optimized adjacent adhesive layer, and increasing a thickness of said electrical insulator polyimide layer with a decrease in a thickness of said respective optimized adjacent adhesive layer. 14. A non-transitory machine readable medium with a flexible circuit design computer program product for implementing enhanced low loss, thin, high performance flexible circuits in a computer system, said computer program product tangibly embodied in a non-transitory machine readable medium used in the integrated circuit design process, said flexible circuit design computer program product including an adhesive control program, said flexible circuit design computer program product including instructions executed by the computer system to cause the computer system to perform the steps of: receiving a plurality of predefined values including predefined layout, spacing and density of conductor, signal trace construct, shape and feature values for each signal layer in a flexible circuit; performing volumetric calculations using the predefined values for each signal layer in the flexible circuit; and responsive to said volumetric calculations, characterizing a respective adjacent adhesive layer for each s

Assignees

Inventors

Classifications

  • H05K1/189Primary

    characterised by the use of flexible or folded printed circuits · CPC title

  • H05K1/028Primary

    Bending or folding regions of flexible printed circuits (H05K1/0283 takes precedence) · CPC title

  • Dielectric details, e.g. changing the dielectric material around a transmission line · CPC title

  • for designing circuits by computer · CPC title

  • Clearance holes · CPC title

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What does patent US9089071B2 cover?
A method, system and computer program product are provided for implementing enhanced low loss, thin, high performance flexible circuits. A plurality of predefined values including predefined layout, spacing and density of conductor, signal trace construct, shape and feature values are provided for each signal layer in a flexible circuit. Volumetric calculations are performed using the predefine…
Who is the assignee on this patent?
Dangler John R, Doyle Matthew S, IBM
What technology area does this patent fall under?
Primary CPC classification H05K1/189. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 21 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).