Switching circuit

US9083333B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9083333-B2
Application numberUS-201213483391-A
CountryUS
Kind codeB2
Filing dateMay 30, 2012
Priority dateJun 7, 2011
Publication dateJul 14, 2015
Grant dateJul 14, 2015

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A switching circuit ( 80 ) includes: a plurality of insulated gate transistors ( 30 - 33 ) connected in parallel between a high voltage line (L 1 ) and a low voltage line (L 2 ); gate resistors ( 50 - 53 ) each provided for one of the plurality of insulated gate transistors ( 30 - 33 ) and each including a first terminal connected to a gate electrode of each of the insulated gate transistors ( 30 - 33 ); and a single gate voltage application unit ( 60 ) configured to apply pulsing gate voltage to the gate electrode of each of the insulated gate transistors ( 30 - 33 ) via the gate resistors ( 50 - 53 ). A second terminal of each of the gate resistors ( 50 - 53 ) provided for each of the plurality of insulated gate transistors ( 30 - 33 ) is connected to the gate voltage application unit ( 60 ) via a gate voltage apply line (L 3 ), and a single capacitor is connected between the gate voltage apply line (L 3 ) and the high voltage line (L 1 ).

First claim

Opening claim text (preview).

The invention claimed is: 1. A switching circuit comprising: a plurality of insulated gate transistors connected in parallel between a high voltage line and a low voltage line; gate resistors, each being connected to one of the plurality of insulated gate transistors, wherein each of the gate resistors includes a first terminal and a second terminal, the first terminal of each of the gate resistors being connected to the respective gate electrode of each of the plurality of insu…

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What does patent US9083333B2 cover?
A switching circuit ( 80 ) includes: a plurality of insulated gate transistors ( 30 - 33 ) connected in parallel between a high voltage line (L 1 ) and a low voltage line (L 2 ); gate resistors ( 50 - 53 ) each provided for one of the plurality of insulated gate transistors ( 30 - 33 ) and each including a first terminal connected to a gate electrode of each of the insulated gate transistors ( …
Who is the assignee on this patent?
Kanie Naohito, Nagase Toshiaki, Toyota Jidoshokki Kk
What technology area does this patent fall under?
Primary CPC classification H03K17/0822. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 14 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).