Silicon precursors for silicon nitride deposition
US-11996286-B2 · May 28, 2024 · US
US9080239B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9080239-B2 |
| Application number | US-201213434934-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 30, 2012 |
| Priority date | Aug 4, 2008 |
| Publication date | Jul 14, 2015 |
| Grant date | Jul 14, 2015 |
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Forming a shallow trench capacitor in conjunction with an FET by forming a plurality of STI trenches; for the FET, implanting a first cell well having a first polarity between a first and a second of the STI trenches; for the capacitor, implanting a second cell well having a second polarity in an area of a third of the STI trenches; removing dielectric material from the third STI trench; forming a gate stack having a first portion located between the first and the second of the STI trenches and a second portion located over and extending into the third trench; and performing a source/drain implant of the same polarity as the second cell well, thereby forming a FET in the first cell well, and a capacitor in the second cell well. The second polarity may be opposite from the first polarity. An additional implant may reduce ESR in the second cell well.
Opening claim text (preview).
What is claimed is: 1. A method for fabricating a trench structure in a semiconductor, the method comprising: providing a semiconductor substrate having at least one trench structure formed therein; positioning the substrate within an angular deposition tool, wherein the substrate is placed on a pedestal, and wherein the pedestal has an adjustable tilt; positioning the pedestal at an angle with respect to the deposition direction; performing an electron filtering operation t…
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