Controlling bandwidth allocations in a system on a chip (SoC)

Patent metadata

Field	Value
Publication number	US-9075952-B2
Application number	US-201313743833-A
Country	US
Kind code	B2
Filing date	Jan 17, 2013
Priority date	Jan 17, 2013
Publication date	Jul 7, 2015
Grant date	Jul 7, 2015

Abstract

In one embodiment, a fabric of a processor such as a system on a chip includes at least one data buffer including a plurality of entries each to store data to be transferred to and from a plurality of agents and to and from a memory, a request tracker to maintain track of pending requests to be output to an ordered domain of the fabric, and an output throttle logic to control allocation into the ordered domain between write transactions from a core agent and read completion transactions from the memory. Other embodiments are described and claimed.

First claim

What is claimed is:

1. A system on a chip (SoC) comprising:
a fabric to interconnect a plurality of agents of the SoC, the fabric comprising:
at least one data buffer including a plurality of entries each to store data to be transferred to and from the plurality of agents, and to and from a memory coupled to the SoC;
a request tracker to maintain track of pending requests to be output to an ordered domain of the fabric, the ordered domain to couple to a plurality of downstream…

Assignees

• Intel Corp

Inventors

• Niell Jose S
• Nagarajan Ramadass

Classifications

• G06F15/7807 Primary

  Physics · mapped topic

• G06F21/70

  Physics · mapped topic

• G06F2221/2101

  Physics · mapped topic

• G06F2221/2141

  Physics · mapped topic

• H04L47/622

  Electricity · mapped topic