Storage device caching update target data unit while entering down-time mode and operating method of the storage device
US-2024345740-A1 · Oct 17, 2024 · US
US9075729B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9075729-B2 |
| Application number | US-201213511888-A |
| Country | US |
| Kind code | B2 |
| Filing date | May 16, 2012 |
| Priority date | May 16, 2012 |
| Publication date | Jul 7, 2015 |
| Grant date | Jul 7, 2015 |
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Official abstract text for this publication.
An embodiment of the present invention is a storage system including a plurality of non-volatile storage devices for storing user data, and a controller for controlling data transfer between the plurality of non-volatile storage devices and a host. The controller includes a processor core circuit, a processor cache, and a primary storage device including a cache area for temporarily storing user data. The processor core circuit ascertains contents of a command received from the host. The processor core circuit ascertains a retention storage device of data to be transferred in the storage system in operations responsive to the command. The processor core circuit determines whether to transfer the data via the processor cache in the storage system, based on a type of the command and the ascertained retention storage device.
Opening claim text (preview).
The invention claimed is: 1. A storage system comprising: a plurality of non-volatile storage devices for storing user data; and a controller for controlling data transfer between the plurality of non-volatile storage devices and a host, wherein the controller includes a processor core circuit, a processor cache, a data transfer circuit, a drive interface circuit, and a primary storage device including a cache area for temporarily storing user data; wherein the processor cor…
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
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