Low-power high-performance clock path architecture
US-2024393824-A1 · Nov 28, 2024 · US
Digital duty cycle correction circuit
US9071237B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9071237-B2 |
| Application number | US-201414207751-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 13, 2014 |
| Priority date | Mar 15, 2013 |
| Publication date | Jun 30, 2015 |
| Grant date | Jun 30, 2015 |
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Abstract
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A digital duty cycle correction circuit includes a duty cycle controller and a digital duty control code generator. The duty cycle controller generates first and second output clock signals by compensating duty cycles of first and second input clock signals based on a digital duty control code. The digital duty control code generator generates the digital duty control code based on a frequency value obtained by converting duty cycle information of the first output clock signal and the second output clock signal.
First claim
Opening claim text (preview).
What is claimed is: 1. A digital duty cycle correction circuit comprising: a duty cycle controller configured to generate a first output clock signal and a second output clock signal by compensating a duty cycle of a first input clock signal and a duty cycle of a second input clock signal based on a digital duty control code, the first and second input clock signals being a pair of differential signals, the first and second output clock signals being a pair of differential signals…
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Classifications
- H03K5/1565Primary
Electricity · mapped topic
Physics · mapped topic
- G11C5/14Primary
Physics · mapped topic
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- What does patent US9071237B2 cover?
- A digital duty cycle correction circuit includes a duty cycle controller and a digital duty control code generator. The duty cycle controller generates first and second output clock signals by compensating duty cycles of first and second input clock signals based on a digital duty control code. The digital duty control code generator generates the digital duty control code based on a frequency …
- Who is the assignee on this patent?
- Samsung Electronics Co Ltd
- What technology area does this patent fall under?
- Primary CPC classification H03K5/1565. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Jun 30 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).