Wafer-level light emitting diode package and method of fabricating the same

US9070851B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9070851-B2
Application numberUS-201113194317-A
CountryUS
Kind codeB2
Filing dateJul 29, 2011
Priority dateSep 24, 2010
Publication dateJun 30, 2015
Grant dateJun 30, 2015

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Abstract

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Exemplary embodiments of the present invention provide a wafer-level light emitting diode (LED) package and a method of fabricating the same. The LED package includes a semiconductor stack including a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer; a plurality of contact holes arranged in the second conductive type semiconductor layer and the active layer, the contact holes exposing the first conductive type semiconductor layer; a first bump arranged on a first side of the semiconductor stack, the first bump being electrically connected to the first conductive type semiconductor layer via the plurality of contact holes; a second bump arranged on the first side of the semiconductor stack, the second bump being electrically connected to the second conductive type semiconductor layer; and a protective insulation layer covering a sidewall of the semiconductor stack.

First claim

Opening claim text (preview).

What is claimed is: 1. A light emitting diode (LED) package, comprising: a semiconductor stack comprising a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer; a plurality of contact holes arranged in the second conductive type semiconductor layer and the active layer, the contact holes exposing the first conductive type semiconductor layer; a first bump arranged on a first side of the semiconductor stack, the first bum…

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What does patent US9070851B2 cover?
Exemplary embodiments of the present invention provide a wafer-level light emitting diode (LED) package and a method of fabricating the same. The LED package includes a semiconductor stack including a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer; a plurality of contact holes arranged in the second conductive type semiconductor laye…
Who is the assignee on this patent?
Seo Won Cheol, Kal Dae Sung, Seoul Semiconductor Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10H29/14. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jun 30 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).