Semiconductor device and method of manufacturing semiconductor device

US9070643B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9070643-B2
Application numberUS-201213468457-A
CountryUS
Kind codeB2
Filing dateMay 10, 2012
Priority dateMay 24, 2011
Publication dateJun 30, 2015
Grant dateJun 30, 2015

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A semiconductor device including: a base material portion that includes a semiconductor substrate and an insulating film that is formed on one face of the semiconductor substrate and on which a vertical hole is formed along the thickness direction of the semiconductor substrate; a vertical hole wiring portion that includes a vertical hole electrode formed on a side wall of the base material portion that forms the vertical hole; a metallic film that is formed within the insulating film and that is electrically connected to the vertical hole wiring portion; and a conductive protective film that is formed to be in contact with the metallic film within the insulating film and that is formed in a region that includes a contact region of a probe during a probe test that is performed in the middle of manufacture on a film face of the metallic film.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of manufacturing a semiconductor device comprising: forming a metallic film inside an insulating film of a base material portion that includes a semiconductor substrate and the insulating film which is formed on one face of the semiconductor substrate; forming a conductive protective film to be in physical contact with the metallic film within a predetermined region that is within the insulating film and within a film face of the metallic film, wh…

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What does patent US9070643B2 cover?
A semiconductor device including: a base material portion that includes a semiconductor substrate and an insulating film that is formed on one face of the semiconductor substrate and on which a vertical hole is formed along the thickness direction of the semiconductor substrate; a vertical hole wiring portion that includes a vertical hole electrode formed on a side wall of the base material por…
Who is the assignee on this patent?
Nagata Masaya, Sony Corp
What technology area does this patent fall under?
Primary CPC classification H10W20/20. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jun 30 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).