Methods of forming semiconductor devices
US-2024387699-A1 · Nov 21, 2024 · US
US9070639B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9070639-B2 |
| Application number | US-201113069488-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 23, 2011 |
| Priority date | Mar 23, 2011 |
| Publication date | Jun 30, 2015 |
| Grant date | Jun 30, 2015 |
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Official abstract text for this publication.
In sophisticated semiconductor devices, manufacturing techniques and etch masks may be formed on the basis of a mask layer stack which comprises an additional mask layer, which may receive an opening on the basis of lithography techniques. Thereafter, the width of the mask opening may be reduced by applying a selective deposition or growth process, which thus results in a highly uniform and well-controllable adjustment of the target width of the etch mask prior to performing the actual patterning process, for instance for forming sophisticated contact openings, via openings and the like.
Opening claim text (preview).
What is claimed: 1. A method of forming an etch mask above a semiconductor device, the method comprising: forming an opening in a mask layer formed above at least one further mask layer and a material layer to be patterned, said opening extending through said mask layer and exposing a surface of a first layer formed below said mask layer; performing a selective deposition process by initiating selective growth of material on an exposed sidewall surface of said mask layer so as t…
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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