Array substrate, manufacturing method thereof and display device

Patent metadata

Field	Value
Publication number	US-9070599-B2
Application number	US-201314361396-A
Country	US
Kind code	B2
Filing date	Oct 31, 2013
Priority date	Mar 25, 2013
Publication date	Jun 30, 2015
Grant date	Jun 30, 2015

Abstract

An array substrate, a manufacturing method thereof and a display device are provided, and the array substrate comprises: a substrate ( 1 ); a plurality of data lines ( 16 ), formed on the substrate and extending in a first direction; a plurality of gate lines ( 15 ), formed on the substrate ( 1 ), crossing the plurality of data lines ( 15 ), and extending in a second direction perpendicular to the first direction; a plurality of pixel regions, defined by the plurality of gate lines ( 15 ) and the plurality of data lines ( 15 ) crossing each other and arranged in a matrix form, wherein each of the pixel regions is provided with a thin film transistor and a pixel electrode ( 12 ), wherein, the thin film transistor comprises: a gate electrode ( 2 ), connected with one of the plurality of gate lines ( 15 ); a gate insulating layer ( 3 ), provided above the gate line ( 15 ) and the gate electrode ( 2 ); an active layer ( 5 ), formed on the gate insulating layer ( 3 ) and disposed corresponding to the gate electrode ( 2 ); a drain electrode ( 8 ) and a source electrode ( 9 ), disposed opposite to each other above the active layer ( 5 ) and having a channel region of the thin film transistor therebetween; a filling layer ( 4 ), provided between the gate electrode ( 2 ) and the gate line ( 15 ) connected with the gate electrode, and the drain and source electrodes ( 8 ) and ( 9 ); and a passivation layer ( 10 ), provided on the source electrode ( 9 ), the drain electrode ( 8 ) and the active layer ( 5 ), wherein at a position directly facing the gate line ( 15 ), the passivation layer ( 10 ) is provided with a passivation layer through hole ( 11 ) configured to perform a connection between the drain electrode ( 8 ) and the pixel electrode ( 12 ).

First claim

The invention claimed is:

1. An array substrate, comprising:
a substrate;
a plurality of data lines, formed on the substrate and extending in a first direction;
a plurality of gate lines, formed on the substrate, crossing the plurality of data lines, and extending in a second direction perpendicular to the first direction;
a plurality of pixel regions, defined by the plurality of gate lines and the plurality of data lines crossing each other and arranged in a matrix form, wh…

Assignees

• Boe Technology Group Co Ltd

Inventors

• Kim Heecheol
• Song Youngsuk
• Yoo Seongyeol
• Choi Seungjin

Classifications

• G02F2201/40

  Physics · mapped topic

• G02F1/1368

  Physics · mapped topic

• G02F1/136227

  Physics · mapped topic

• G02F1/1362

  Physics · mapped topic

• H10P50/264

  Electricity · mapped topic