Package substrate and semiconductor package including the same
US-2024429153-A1 · Dec 26, 2024 · US
US9070568B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9070568-B2 |
| Application number | US-201313951556-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jul 26, 2013 |
| Priority date | Jul 26, 2013 |
| Publication date | Jun 30, 2015 |
| Grant date | Jun 30, 2015 |
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A chip package includes an electrically conducting chip carrier and at least one first semiconductor chip attached to the electrically conducting chip carrier. The chip package further includes a passive component. The electrically conducting chip carrier, the at least one first semiconductor chip, and the passive component are embedded in an insulating laminate structure.
Opening claim text (preview).
What is claimed is: 1. A chip package, comprising: an electrically conducting chip carrier; at least one first semiconductor chip attached to the electrically conducting chip carrier; a passive component; and an insulating laminate structure embedding the electrically conducting chip carrier, the at least one first semiconductor chip, and the passive component, wherein the passive component is arranged at a different level than the first semiconductor chip such that the pa…
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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