Wiring board and method for manufacturing the same

US9066439B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9066439-B2
Application numberUS-201213483587-A
CountryUS
Kind codeB2
Filing dateMay 30, 2012
Priority dateJul 14, 2011
Publication dateJun 23, 2015
Grant dateJun 23, 2015

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A wiring board has a first wiring board having a first solder-resist layer, a second wiring board connected to the first wiring board and positioned in a first opening portion formed in the first solder-resist layer of the first wiring board, and a third wiring board connected to the first wiring board and positioned in a second opening portion formed in the first solder-resist layer of the first wiring board such that the second wiring board and the third wiring board are on the same side of the first wiring board. The first opening portion of the first wiring board and the second opening portion of the first wiring board form either a common opening portion accommodating the second and third wiring boards in the first solder-resist layer or separate opening portions separately accommodating the second wiring board and the third wiring board in the first solder-resist layer.

First claim

Opening claim text (preview).

What is claimed is: 1. A wiring board, comprising: a first multilayer wiring board comprising a first solder-resist layer; a second multilayer wiring board connected to the first multilayer wiring board and positioned in a first opening portion formed in the first solder-resist layer of the first multilayer wiring board; and a third multilayer wiring board connected to the first multilayer wiring board and positioned in a second opening portion formed in the first solder-resis…

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Frequently asked questions

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What does patent US9066439B2 cover?
A wiring board has a first wiring board having a first solder-resist layer, a second wiring board connected to the first wiring board and positioned in a first opening portion formed in the first solder-resist layer of the first wiring board, and a third wiring board connected to the first wiring board and positioned in a second opening portion formed in the first solder-resist layer of the fir…
Who is the assignee on this patent?
Segawa Hiroshi, Naganuma Nobuyuki, Takahashi Michimasa, and 2 more
What technology area does this patent fall under?
Primary CPC classification H05K1/141. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jun 23 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).