Interleaver design and pairwise codeword distance distribution enhancement for turbo autoencoder
US-12175353-B2 · Dec 24, 2024 · US
US9065486B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9065486-B2 |
| Application number | US-201414300734-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jun 10, 2014 |
| Priority date | Dec 16, 2002 |
| Publication date | Jun 23, 2015 |
| Grant date | Jun 23, 2015 |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
Detecting, avoiding and/or correcting problematic puncturing patterns in parity bit streams used when implementing punctured Turbo codes is achieved without having to avoid desirable code rates. This enables identification/avoidance of regions of relatively poor Turbo code performance. Forward error correction comprising Turbo coding and puncturing achieves a smooth functional relationship between any measure of performance and the effective coding rate resulting from combining the lower rate code generated by the Turbo encoder with puncturing of the parity bits. In one embodiment, methods to correct/avoid degradations due to Turbo coding are implemented by puncturing interactions when two or more stages of rate matching are employed.
Opening claim text (preview).
What is claimed is: 1. An apparatus for use in wireless communications comprising: a first interleaver configured to interleave systematic bits; a second interleaver configured to interleave a first parity bit stream; a third interleaver configured to interleave a second parity bit stream; a buffer configured to buffer the interleaved systematic bits, the interleaved first parity bit stream and the interleaved second parity bit stream; and a rate matching unit configured t…
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Related publications grouped by family.
Free tools are coming soon. Tell us what you want to track and we'll notify you.
Answers are generated from the same data shown on this page.