Method and apparatus for reducing capacitor induced ISI in DACS

US9065463B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9065463-B2
Application numberUS-201314052196-A
CountryUS
Kind codeB2
Filing dateOct 11, 2013
Priority dateOct 11, 2013
Publication dateJun 23, 2015
Grant dateJun 23, 2015

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Abstract

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A circuit may include a plurality of primary digital-to-analog (DAC) elements for converting a digital input signal into an analog output signal. A control circuit may control each primary DAC element to switch between a first state and a second state based on the digital input signal to provide the analog output signal at an output representing the digital input signal. A plurality of corrective DAC elements may be coupled in parallel to the plurality of primary DAC elements between the control circuit and the output. The plurality of corrective DAC elements may be controlled to mitigate for intersymbol interference (ISI) due to parasitic capacitance in the primary DAC elements. The plurality of corrective DAC elements may not contribute a direct current to the analog output signal.

First claim

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What is claimed is: 1. A circuit comprising: a plurality of primary digital-to-analog (DAC) elements for converting a digital input signal into an analog output signal; a control circuit controlling each primary DAC element to switch between a first state and a second state based on the digital input signal to provide the analog output signal representing the digital input signal at an output; and a plurality of corrective DAC elements coupled in parallel to the plurality of p…

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What does patent US9065463B2 cover?
A circuit may include a plurality of primary digital-to-analog (DAC) elements for converting a digital input signal into an analog output signal. A control circuit may control each primary DAC element to switch between a first state and a second state based on the digital input signal to provide the analog output signal at an output representing the digital input signal. A plurality of correcti…
Who is the assignee on this patent?
Rajasekhar Sanjay, Analog Devices Global
What technology area does this patent fall under?
Primary CPC classification H03M1/08. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jun 23 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).