Cell design for embedded thermally-assisted MRAM

Patent metadata

Field	Value
Publication number	US-9065035-B2
Application number	US-201314036707-A
Country	US
Kind code	B2
Filing date	Sep 25, 2013
Priority date	Mar 14, 2013
Publication date	Jun 23, 2015
Grant date	Jun 23, 2015

Abstract

A thermally assisted magnetoresistive random access memory cell, a corresponding array, and a method for fabricating the array. An example cell includes a first metal layer, a second metal layer, an interlayer, a first magnetic stack, and a first non-magnetic via. The first metal layer includes a pad and a first metal line, with the pad not in direct contact with the first metal line. The second metal layer includes a second metal line and a metal strap. The second metal line is perpendicular to the first metal line and not in contact with the metal strap. The interlayer is located between the first and second metal layers. The first metal line is not in direct contact with the interlayer. The first magnetic stack is in direct contact with the interlayer and the metal strap. The first non-magnetic via is in direct contact with the pad and the metal strap.

First claim

What is claimed is:

1. A method for constructing an array of thermally assisted magnetoresistive random access memory (MRAM) cells, the method comprising:
depositing a first metal layer, the first metal layer including a plurality of pads and a plurality of first metal lines, wherein none of the plurality of pads are in direct contact with any of the plurality of first metal lines;
forming an interlayer over the first metal layer, wherein the none of plurality of first metal lines are in direct contact with the interlayer;
forming a plurality of first magnetic stacks in direct contact with the interlayer;
forming a plurality of first vias in direct contact with the pads;
depositing a second metal layer over the interlayer, the second metal layer including a plurality of second metal lines and a plurality of metal straps, wherein none of the second metal lines are in direct contact with any of the metal straps, each of the metal straps is in direct contact with one of the first magnetic stacks and one of the first vias, and the plurality of second metal lines are perpendicular to the first metal lines.

2. The method of claim 1 , further comprising forming a plurality of second magnetic stacks in direct contact with the interlayer and the second metal lines, the second magnetic stacks having different dimensions than the first magnetic stacks.

3. The method of claim 1 , further comprising forming a plurality of second vias in direct contact with the interlayer and the second metal line.

4. The method of claim 1 , wherein the plurality of pads are not in direct contact with each other.

5. The method of claim 1 , wherein the plurality of metal straps are not in direct contact with each other.

6. The method of claim 1 , wherein the interlayer is comb-shaped.

7. The method of claim 6 , wherein the interlayer contains a plurality of teeth, and the plurality of teeth are aligned parallel to the plurality of second metal lines.

Assignees

• IBM

Inventors

• Annunziata Anthony J
• Debrosse John K

Classifications

• H01L43/12

  Electricity · mapped topic

• H01L43/02 Primary

  Electricity · mapped topic

• H01L27/228

  Electricity · mapped topic

• H10B61/22 Primary

  of the field-effect transistor [FET] type · CPC title

• H10N50/80 Primary

  Constructional details · CPC title