Chip with encapsulated sides and exposed surface

Patent metadata

Field	Value
Publication number	US-9064883-B2
Application number	US-201113218265-A
Country	US
Kind code	B2
Filing date	Aug 25, 2011
Priority date	Aug 25, 2011
Publication date	Jun 23, 2015
Grant date	Jun 23, 2015

Abstract

A method of manufacturing a device includes providing a semiconductor chip having a first face and a second face opposite to the first face with a contact pad arranged on the first face. The semiconductor chip is placed on a carrier with the first face facing the carrier. The semiconductor chip is encapsulated with an encapsulation material. The carrier is removed and the semiconductor material is removed from the second face of the first semiconductor chip without removing encapsulation material at the same time.

First claim

What is claimed is:

1. A device, comprising:
a semiconductor chip having a first face and a second face opposite to the first face, wherein a contact pad is arranged within the semiconductor chip at the first face thereof, wherein the contact pad has a contact surface coplanar with the first face of the semiconductor chip and an opposing surface, opposite the contact surface, facing toward the second face of the semiconductor chip, and wherein the contact pad provides an electrical coupling at the contact surface thereof for an element external to the semiconductor chip with an integrated circuit of the semiconductor chip; and
an encapsulation material having a first face and a second face opposite to the first face,
wherein the encapsulating material encapsulates the semiconductor chip,
wherein the first face of the semiconductor chip and the first face of the encapsulation material are co-planar thereby defining a plane,
wherein the first face of the semiconductor chip is exposed from the encapsulation material, and wherein the second face of the semiconductor chip is also exposed from the encapsulation material,
wherein the second face of the semiconductor chip and the second face of the encapsulation material have a height difference in the range from 3 to 10 μm, and
wherein a thickness of the semiconductor chip is smaller than a thickness of the encapsulation material.

2. The device of claim 1 , wherein the second face of the semiconductor chip is exposed from the encapsulation material.

3. The device of claim 1 , wherein the encapsulation material covers side faces of the semiconductor chip.

4. The device of claim 1 , wherein a redistribution layer is arranged on the plane defined by the first face of the semiconductor chip and the first face of the encapsulation material.

5. The device of claim 4 , wherein the redistribution layer extends beyond an outline of the semiconductor chip.

6. The device of claim 1 , wherein the difference between a thickness of the semiconductor chip and a thickness of the encapsulation material is equal to the height difference between the second face of the semiconductor chip and the second face of the encapsulation material.

7. The device of claim 1 , wherein the encapsulation material is homogenous and entirely made of the same material.

Assignees

• Meyer Thorsten
• Reingruber Klaus
• O'Sullivan David
• Intel Mobile Comm Gmbh

Inventors

• Meyer Thorsten
• Reingruber Klaus
• O'Sullivan David

Classifications

• H10W74/142

  the encapsulations exposing the passive side of the semiconductor body · CPC title

• H10W72/874

  On different surfaces · CPC title

• H10W72/29

  Bond pads specially adapted therefor · CPC title

• H10W72/922

  Bond pads being integral with underlying chip-level interconnections · CPC title

• H10W72/9413

  on encapsulations · CPC title