Capacitor structure of gate driver in panel

US9064754B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9064754-B2
Application numberUS-201414576165-A
CountryUS
Kind codeB2
Filing dateDec 18, 2014
Priority dateMar 26, 2013
Publication dateJun 23, 2015
Grant dateJun 23, 2015

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Abstract

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A capacitor structure of gate driver in panel (GIP) includes a first metal layer, a first dielectric layer, a second metal layer, a second dielectric layer, a first and second transparent capacitor electrode layers. The first dielectric layer covers the first metal layer. The second metal layer is disposed on the first dielectric layer and coupled to the first metal layer. The second dielectric layer covers the second metal layer. The first transparent capacitor electrode layer is disposed on the first dielectric layer and connected to the second metal layer. The second transparent capacitor electrode layer is disposed on the second dielectric layer and coupled to the first metal layer, in which the second and first transparent capacitor electrode layers are arranged to be stacked in a thickness direction and mutually opposed across the second dielectric layer therebetween.

First claim

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What is claimed is: 1. A capacitor structure of gate driver in panel, comprising: a first metal layer; a first dielectric layer covering the first metal layer and including a first opening exposing a portion of the first metal layer; a second metal layer disposed on the first dielectric layer, and a portion of the second metal layer is coupled to the first metal layer through the first opening; a second dielectric layer covering the second metal layer and including a second…

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What does patent US9064754B2 cover?
A capacitor structure of gate driver in panel (GIP) includes a first metal layer, a first dielectric layer, a second metal layer, a second dielectric layer, a first and second transparent capacitor electrode layers. The first dielectric layer covers the first metal layer. The second metal layer is disposed on the first dielectric layer and coupled to the first metal layer. The second dielectric…
Who is the assignee on this patent?
Chunghwa Picture Tubes Ltd
What technology area does this patent fall under?
Primary CPC classification H10D86/481. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jun 23 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).