Thin film transistor array substrate and manufacturing method thereof

Patent metadata

Field	Value
Publication number	US-9064751-B2
Application number	US-201314102726-A
Country	US
Kind code	B2
Filing date	Dec 11, 2013
Priority date	Dec 27, 2012
Publication date	Jun 23, 2015
Grant date	Jun 23, 2015

Abstract

Disclosed is a thin-film transistor array substrate including a Gate driver In Panel (GIP). The GIP includes a first wiring on a substrate, a first insulating film covering the first wiring, a second wiring on the first insulating film, a second insulating film covering the second wiring, a third insulating film over the second insulating film, first and second contact holes to expose the first and second wirings, and a third wiring on the third insulating film for connection of the first and second wirings. The third insulating film includes a first area corresponding to the first and second contact holes, a second area corresponding to a region between the first and second contact holes within a first thickness range, and a remaining third area within a second thickness range, the minimum value of the first thickness range being greater than the maximum value of the second thickness range.

First claim

What is claimed is:

1. A thin film transistor array substrate comprising a cell array corresponding to a display area, and a Gate driver In Panel (GIP) corresponding to a partial area of a non-display area around the display area,
wherein the GIP includes:
a first wiring formed on a substrate;
a first insulating film formed over the substrate to cover the first wiring;
a second wiring formed on the first insulating film;
a second insulating film formed over the first insul…

Assignees

• Lg Display Co Ltd

Inventors

• Jang Jin-Hee

Classifications

• H10D86/451

  Electricity · mapped topic

• H10D86/0231

  Electricity · mapped topic

• H10D86/021

  Electricity · mapped topic

• H10D86/441 Primary

  Electricity · mapped topic

• H10D86/60 Primary

  Electricity · mapped topic