Shift register and a display

Patent metadata

Field	Value
Publication number	US-9064592-B2
Application number	US-201213995672-A
Country	US
Kind code	B2
Filing date	Dec 17, 2012
Priority date	Apr 24, 2012
Publication date	Jun 23, 2015
Grant date	Jun 23, 2015

Abstract

A shift register is used for solving the problem that the shift register in the prior art can only perform a forward scanning driving but can not perform a bi-directional scanning driving. The shift register includes: a first TFT(T 1 ), a second TFT(T 2 ), a reset unit and a pulling-up unit. The present disclosure further provides a display including the shift register. The shift register and the display can achieve a bi-directional scanning driving.

First claim

What is claimed is:

1. A shift register including a plurality of shift register units at a plurality of stages, wherein the shift register unit at each stage includes:
a first Thin Film Transistor (TFT) for charging or discharging a pulling-up node under the control of a driving input signal and a scanning direction selection signal, wherein the first TFT serves as a start switch of the shift register unit at the stage to charge the pulling-up node during a forward scanning driving and serves as a reset switch of the shift register unit at the stage to discharge the pulling-up node during a reverse scanning driving;
a second TFT for charging or discharging the pulling-up node under the control of a first reset signal and the scanning direction selection signal, wherein the second TFT serves as a reset switch of the shift register unit at the stage to discharge the pulling-up node during a forward scanning driving and serves as a start switch of the shift register unit at the stage to charge the pulling-up node during a reverse scanning driving;
a reset unit for resetting the pulling-up node and an output terminal;
a pulling-up unit for pulling up a potential at the output terminal during an outputting phase; and
a reset control unit configured to ensure that the output terminal is reset by the reset unit;
wherein, a gate of the first TFT is connected to an input terminal, a source of the first TFT is connected to the pulling-up node, a drain of the first TFT is connected to a first scanning direction selection signal input terminal; and
a gate of the second TFT is connected to a first reset signal input terminal, a source of the second TFT is connected to the pulling-up node, and a drain of the second TFT is connected to the first scanning direction selection signal input terminal;
wherein the reset control unit includes:
a first reset control TFT having a gate connected to the first reset signal input terminal, a source connected to a low level and a drain connected to the output terminal; and
a second reset control TFT having a gate connected to the input terminal, a source connected to the low level and a drain connected to the output terminal.

2. The shift register according to claim 1 , wherein the pulling-up unit includes:
a third TFT having a gate connected to a first terminal of a storage capacitor, a source connected to the output terminal and a drain connected to a first dock signal input terminal; and
the storage capacitor having the first terminal connected to the pulling-up node and a second terminal connected to the output terminal.

3. The shift register according to claim 1 , wherein the reset unit includes:
a fourth TFT having a gate connected to a second clock signal input terminal, a source connected to the low level and a drain connected to the output terminal;
a fifth TFT having a gate connected to a pulling-down control node, a source connected to a pulling-down node and a drain connected to the second dock signal input terminal;
a sixth TFT having a gate connected to the pulling-up node, a source connected to the low level and a drain connected to the pulling-down node;
a seventh TFT having a gate and a drain connected to the second dock signal input terminal and a source connected to the pulling-down control node;
an eighth TFT having a gate connected to the pulling-up node, a source connected to the low level and a drain connected to the puffing-down control node;
a ninth TFT having a gate connected to the puffing-down node, a source connected to the low level and a drain connected to the pulling-up node; and
a tenth TFT having a gate connected to the pulling-down node, a source connected to the low level and a drain connected to the output terminal.

4. A display including the shift register according to claim 1 .

5. A shift register including a plurality of shift register units at a plurality of stages, wherein the shift register unit at each stage includes:
a first Thin Film Transistor (TFT) for charging or discharging a pulling-up node under the control of a driving input signal and a scanning direction selection signal, wherein the first TFT serves as a start switch of the shift register unit at the stage to charge the pulling-up node during a forward scanning driving and serves as a reset switch of the shift register unit at the stage to discharge the pulling-up node during a reverse scanning driving;
a second TFT for charging or discharging the pulling-up node under the control of a first reset signal and the scanning direction selection signal, wherein the second TFT serves as a reset switch of the shift register unit at the stage to discharge the pulling-up node during a forward scanning driving and serves as a start switch of the shift register unit at the stage to charge the pulling-up node during a reverse scanning driving;
a reset unit for resetting the pulling-up node and an output terminal;
a pulling-up unit for pulling up a potential at the output terminal during an outputting phase; and
a reset control unit configured to ensure that the output terminal is reset by the reset unit;
wherein, a gate of the first TFT is connected to an input terminal, a source of the first TFT is connected to the pulling-up node, a drain of the first TFT is connected to a first scanning direction selection signal input terminal; and
a gate of the second TFT is connected to a first reset signal input terminal, a source of the second TFT is connected to the pulling-up node, and a drain of the second TFT is connected to the first scanning direction selection signal input terminal;
wherein the reset control unit includes:
a first reset control TFT having a gate connected to the first reset signal input terminal, a source connected to the reset unit and a drain connected to a second scanning direction selection signal input terminal;

a second reset control TFT having a gate connected to the input terminal, a source connected to the source of the first reset control TFT and a drain connected to the second scanning direction selection signal input terminal.

6. The shift register according to claim 5 , wherein the reset unit includes:
a fifth TFT having a gate connected to a pulling-down control node, a source connected to a puffing-down node and a drain connected to a second clock signal input terminal;
a sixth TFT having a gate connected to the pulling-up node, a source connected to a low level and a drain connected to the pulling-down node;
a seventh TFT having a gate and a drain connected to the second clock signal input terminal and a source connected to the pulling-down control node;
an eighth TFT having a gate connected to the pulling-up node, a source connected to the low level and a drain connected to the pulling-down control node;
a ninth TFT having a gate connected to the pulling-down node, a source connected to the low level and a drain connected to the pulling-up node;
a tenth TFT having a gate connected to the pulling-down node, a source connected to the low level and a drain connected to the output terminal; and
a thirteenth TFT having a gate connected to the source of the first reset control TFT, a source connected to the low level and a drain connected to the output terminal.

7. The shift register according to claim 5 , wherein the reset control unit further includes:
a third reset control TFT having a gate connected to the first scanning direction selection signal input terminal, a source connected to the low level and a drain connected to the source of the first reset control TFT.

8. The shift register according to claim 5 , wherein the reset control unit further includes:
a fourth reset control TFT having a gate connected to a second reset signal input terminal, a source conne

Assignees

• Boe Technology Group Co Ltd

Inventors

• Shang Guangliang
• Han Seung Woo
• Zhao Jiayang

Classifications

• G09G3/20

  for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix {no fixed position being assigned to or needed to be assigned to the individual characters or partial characters} · CPC title

• G11C19/28

  using semiconductor elements (G11C19/14, G11C19/36 take precedence) · CPC title

• G09G3/3266

  Details of drivers for scan electrodes · CPC title

• G09G3/3688

  suitable for active matrices only · CPC title

• G11C19/184 Primary

  with field-effect transistors, e.g. MOS-FET · CPC title