Method of manufacturing printed circuit board
US-2024414849-A1 · Dec 12, 2024 · US
Printed wiring board and method for manufacturing same
US9060459B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9060459-B2 |
| Application number | US-201213434960-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 30, 2012 |
| Priority date | Sep 20, 2007 |
| Publication date | Jun 16, 2015 |
| Grant date | Jun 16, 2015 |
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- Title
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Abstract
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A printed wiring board includes multiple conductive layers having conductive circuits, multiple resin insulation layers having openings and including the uppermost resin insulation layer positioned as the outermost layer of the resin insulation layers, multiple via conductors formed in the openings, respectively, and connecting the conductive circuits in the conductive layers, and multiple component-loading pads formed of a copper foil and positioned to load an electronic component. The resin insulation layers and the conductive layers are alternately laminated, and the component-loading pads are formed on the uppermost resin insulation layer.
First claim
Opening claim text (preview).
What is claimed is: 1. A printed wiring board, comprising: a plurality of conductive layers having a plurality of conductive circuits; a plurality of resin insulation layers including an uppermost resin insulation layer positioned as an outermost layer of the plurality of resin insulation layers; a plurality of via conductors formed in the plurality of resin insulation layers, respectively, and connecting the plurality of conductive circuits in the plurality of conductive laye…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US9060459B2 cover?
- A printed wiring board includes multiple conductive layers having conductive circuits, multiple resin insulation layers having openings and including the uppermost resin insulation layer positioned as the outermost layer of the resin insulation layers, multiple via conductors formed in the openings, respectively, and connecting the conductive circuits in the conductive layers, and multiple comp…
- Who is the assignee on this patent?
- Niki Ayao, Kitajima Kazuhisa, Ibiden Co Ltd
- What technology area does this patent fall under?
- Primary CPC classification H05K3/4682. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Jun 16 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).