Semiconductor device including flip-flop and logic circuit

US9059689B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9059689-B2
Application numberUS-201414160774-A
CountryUS
Kind codeB2
Filing dateJan 22, 2014
Priority dateJan 24, 2013
Publication dateJun 16, 2015
Grant dateJun 16, 2015

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

To provide a semiconductor device capable of adjusting the timing of a clock signal or a high-quality semiconductor device. The semiconductor device includes a first transistor and a circuit including a second transistor. A channel of the first transistor is formed in an oxide semiconductor layer. A first signal is input to one of a source and a drain of the first transistor. The other of the source and the drain of the first transistor is electrically connected to a gate of the second transistor. A first clock signal is input to the circuit. The circuit outputs a second clock signal. The timing of the second clock signal is different from that of the first clock signal.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor device comprising: a first transistor; a circuit including a second transistor; a flip-flop; and a logic circuit, wherein a channel of the first transistor is included in an oxide semiconductor layer, wherein an output of the logic circuit is input to a gate of the first transistor, wherein a first signal is input to one of a source and a drain of the first transistor, wherein the other of the source and the drain of the first t…

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What does patent US9059689B2 cover?
To provide a semiconductor device capable of adjusting the timing of a clock signal or a high-quality semiconductor device. The semiconductor device includes a first transistor and a circuit including a second transistor. A channel of the first transistor is formed in an oxide semiconductor layer. A first signal is input to one of a source and a drain of the first transistor. The other of the s…
Who is the assignee on this patent?
Semiconductor Energy Lab
What technology area does this patent fall under?
Primary CPC classification H03K5/06. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jun 16 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).