Floating gate memory device with at least partially surrounding control gate

US9059302B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9059302-B2
Application numberUS-41862309-A
CountryUS
Kind codeB2
Filing dateApr 6, 2009
Priority dateApr 6, 2009
Publication dateJun 16, 2015
Grant dateJun 16, 2015

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  2. Abstract

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  5. First independent claim

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Abstract

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One or more embodiments relate to a floating gate memory device, comprising: a substrate; a floating gate disposed over the substrate; and a control gate substantially laterally surrounding at least a portion of the floating gate.

First claim

Opening claim text (preview).

What is claimed is: 1. A floating gate memory device, comprising: a semiconductor substrate; source/drain regions disposed in the semiconductor substrate; a floating gate disposed over the semiconductor substrate, said floating gate disposed over said semiconductor substrate, said floating gate having a floating gate height, a floating gate length, and a floating gate width, said floating gate length being in the direction of a channel length, said floating gate width being in…

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What does patent US9059302B2 cover?
One or more embodiments relate to a floating gate memory device, comprising: a substrate; a floating gate disposed over the substrate; and a control gate substantially laterally surrounding at least a portion of the floating gate.
Who is the assignee on this patent?
Van Der Zanden Koen, Schulz Thomas, Infineon Technologies Ag
What technology area does this patent fall under?
Primary CPC classification H10D30/681. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jun 16 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).