Enhanced capacitance touch screen display and methods for use therewith
US-2024411406-A1 · Dec 12, 2024 · US
Capacitive touch screens, method of driving the same and displays
US9057906B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9057906-B2 |
| Application number | US-201314057390-A |
| Country | US |
| Kind code | B2 |
| Filing date | Oct 18, 2013 |
| Priority date | Oct 19, 2012 |
| Publication date | Jun 16, 2015 |
| Grant date | Jun 16, 2015 |
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Abstract
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A capacitive in cell touch panel, its driving method and a display device, in which, on the TFT array substrate, a pixel structure in which two adjacent rows of pixel units form one pixel unit group and two gate signal lines are disposed between the two rows of pixel units of the pixel unit group is adopted. Positions of gate signal lines between adjacent pixel unit groups can be saved by modifying positions of gate signal lines of two adjacent rows of pixel units and TFT switches. As such, touch driving lines with touch function can be set at the saved positions for gate signal lines and touch sensing electrodes can be disposed on the color filter substrate and extend in the column direction of the pixel units to realize touch function while ensuring high aperture ratio.
First claim
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The invention claimed is: 1. A capacitive in cell touch panel, comprising: a color filter substrate, a thin film transistor (TFT) array substrate, and a liquid crystal layer between said color filter substrate and said TFT array substrate, wherein said array substrate includes a plurality of pixel units arranged in matrix, every two adjacent rows of pixel units in said plurality of pixel units are one pixel unit group, two gate signal lines are disposed between the two rows of…
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Physics · mapped topic
Physics · mapped topic
- G02F1/13338Primary
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
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- What does patent US9057906B2 cover?
- A capacitive in cell touch panel, its driving method and a display device, in which, on the TFT array substrate, a pixel structure in which two adjacent rows of pixel units form one pixel unit group and two gate signal lines are disposed between the two rows of pixel units of the pixel unit group is adopted. Positions of gate signal lines between adjacent pixel unit groups can be saved by modif…
- Who is the assignee on this patent?
- Beijing Boe Optoelectronics
- What technology area does this patent fall under?
- Primary CPC classification G02F1/13338. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Jun 16 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).