Error correction device, error correction method and computer program product

Patent metadata

Field	Value
Publication number	US-9054739-B2
Application number	US-201313861547-A
Country	US
Kind code	B2
Filing date	Apr 12, 2013
Priority date	Jun 22, 2012
Publication date	Jun 9, 2015
Grant date	Jun 9, 2015

Abstract

According to an embodiment, an error correction device includes first calculators, second calculators, estimators, and an inverter. Each first calculator calculates a first message representing a probability that 1-bit data that is input in a corresponding variable node is 1. Each second calculator calculates a second message representing a probability that a value of the data input to the variable node is 1 for each of two or more variable nodes connected to the check node by using the first messages of the variable nodes connected to the check node. Each estimator estimates a true value of the data input to the variable node to generate an estimated value by using the first and second messages. The inverter inverts the estimated value associated with at least one of the variable nodes with a probability higher than 0 and lower than 1.

First claim

What is claimed is:

1. An error correction device comprising:
a plurality of first calculators each of which is provided for each of a plurality of variable nodes to which a plurality of pieces of 1-bit data coded on the basis of a low density parity check matrix and is configured to calculate a first message representing a probability that a value of the data input to the variable node is 1;
a plurality of second calculators each of which is provided for each of a plurality of…

Assignees

• Toshiba Kk

Inventors

• Marukame Takao
• Nishi Yoshifumi
• Chen Jiezhi
• Higashi Yusuke
• Kurita Takahiro
• Mitani Yuuichiro
• Kinoshita Atsuhiro

Classifications

• H03M13/1102 Primary

  Electricity · mapped topic

• H03M13/1108 Primary

  Electricity · mapped topic