Embedding semiconductor devices in silicon-on-insulator wafers connected using through silicon vias
US-2015357325-A1 · Dec 10, 2015 · US
US9054232B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9054232-B2 |
| Application number | US-201314378113-A |
| Country | US |
| Kind code | B2 |
| Filing date | Feb 28, 2013 |
| Priority date | Feb 28, 2012 |
| Publication date | Jun 9, 2015 |
| Grant date | Jun 9, 2015 |
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A method for fabricating an epitaxial structure includes providing a substrate ( 102, 202, 302, 402 ) and a heterojunction stack on a first side the substrate, and forming a GaN light emitting diode stack ( 134 ) on a second side of the substrate. The heterojunction stack includes an undoped gallium nitride (GaN) layer and a doped aluminum gallium nitride (AIGaN) layer on the undoped GaN layer. The GaN light emitting diode stack ( 134 ) includes an n-type GaN layer ( 136 ) over the substrate, a GaN/indium gallium nitride (InGaN) multiple quantum well (MQW) structure ( 138 ) over the n-type GaN layer, a p-type AIGaN layer ( 140 ) over the n-type GaN/InGaN MQW structure, and a p-type GaN layer ( 142 ) over the p-type AIGaN layer.
Opening claim text (preview).
The invention claimed is: 1. A method for fabricating an epitaxial structure, comprising: providing a substrate and a heterojunction stack over a first side of the substrate, the heterojunction stack comprising an undoped gallium nitride (GaN) layer over the first side of the substrate and a doped aluminum gallium nitride (AlGaN) layer on the undoped GaN layer; forming a GaN light emitting diode stack over a second side of the substrate, the GaN light emitting diode stack compri…
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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