Neural network computation circuit, control circuit therefor, and control method therefor
US-2024411520-A1 · Dec 12, 2024 · US
US9053787B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9053787-B2 |
| Application number | US-201314119936-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 27, 2013 |
| Priority date | Mar 29, 2012 |
| Publication date | Jun 9, 2015 |
| Grant date | Jun 9, 2015 |
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The nonvolatile memory device includes a control circuit that controls a sense amplification circuit and a writing circuit. The control circuit changes a value of at least one of (a) a load current and (b) a forming pulse current or a forming pulse voltage, according to a total number of sneak current paths formed by memory cells each including a variable resistance element in a second resistance state having a low resistance value except a selected memory cell in a memory cell array.
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The invention claimed is: 1. A crosspoint nonvolatile memory device comprising: a plurality of word lines parallel to each other on a first plane; a plurality of bit lines parallel to each other on a second plane parallel to the first plane, the bit lines three-dimensionally crossing the word lines; a crosspoint memory cell array including memory cells arranged in rows and columns at respective three-dimensional crosspoints between the word lines and the bit lines, each of the…
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