Semiconductor device having plural selection lines

Patent metadata

Field	Value
Publication number	US-9053759-B2
Application number	US-201213683538-A
Country	US
Kind code	B2
Filing date	Nov 21, 2012
Priority date	Nov 25, 2011
Publication date	Jun 9, 2015
Grant date	Jun 9, 2015

Abstract

The semiconductor device includes a plurality of word lines classified into a plurality of groups and a selection circuit for selecting a word line according to an address. The selection circuit has a level shifter arranged for each of the groups. The address includes a first address for selecting any of the groups and a second address for selecting a word line in the selected group. The selection circuit selects a word line by allowing supply of active potential for word line by the level shifter of a group selected by the first address and further allowing supply of the active potential to the word line selected by the second address out of a plurality of word lines belonging to the selected group.

First claim

What is claimed is:

1. A semiconductor device comprising:
a plurality of circuit sets each including a plurality of drive circuits;
a plurality of selection circuits each assigned to an associated one of the circuit sets such that each of the selection circuits are coupled in common to the driver circuits included in the associated one of the circuit sets; and
a plurality of selection lines, wherein
one of the selection circuits selected by a first signal supplies an active…

Assignees

• Ps4 Luxco Sarl

Inventors

• Noguchi Hidekazu

Classifications

• G11C11/4085

  Physics · mapped topic

• G11C8/14

  Physics · mapped topic

• G11C11/4097

  Physics · mapped topic

• G11C7/00

  Physics · mapped topic

• G11C8/08 Primary

  Physics · mapped topic