Memory device, host device, and memory system

US9053347B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9053347-B2
Application numberUS-201113048532-A
CountryUS
Kind codeB2
Filing dateMar 15, 2011
Priority dateMar 29, 2010
Publication dateJun 9, 2015
Grant dateJun 9, 2015

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A memory device includes: a storage unit that stores public key information of a certificate authority for verifying a certificate and includes a secret area storing data of which secrecy is assured; and a control unit that controls access to the storage unit depending on reception information, wherein the reception information includes information where access control information is added to certificate information authenticated by the certificate authority, and the control unit verifies the certificate using the public key, identifies the access control information, and limits the accessible secret area in the storage unit.

First claim

Opening claim text (preview).

What is claimed is: 1. A memory device comprising: a storage unit that stores a public key of a certificate authority for verifying a certificate and includes a secure storage area in which secret data is stored; and a control unit that controls access to the storage unit based on reception information received from a host device, wherein, the reception information includes access control information that is added to the certificate authenticated by the certificate authority, the control unit verifies the certificate using the public key, identifies the access control information, and limits the access to the secure storage area in the storage unit, the secure storage area in the storage unit is divided into a plurality of addressable secret data areas, the access control information includes a first address of one of the plurality of addressable secret data areas in the storage unit, and the control unit confirms the first address of the access control information added to the certificate of the reception information received from the host device and collates the confirmed first address with a second address received from the host device. 2. The memory device according to claim 1 , wherein when upon confirming the first address of the access control information, the control unit transmits confirmation information, decrypts response information responding to the transmitted confirmation information, and sends an authentication notification upon confirming correspondence with a value of the transmitted confirmation information. 3. The memory device according to claim 1 , wherein upon confirming the first address of the addressable secret data area in the access control information, the control unit transmits a pseudorandom number, decrypts encrypted information responding to the transmitted pseudorandom number, and sends an authentication notification upon confirming correspondence with a value of the transmitted pseudorandom number. 4. The memory device according to claim 2 , wherein when receiving the second address in response to the authentication notification, the control unit transmits secret data associated with the second address upon determining that the second address corresponds to the confirmed first address of the reception information. 5. A host device comprising: a storage device that stores a certificate issued by at least a certificate authority; and a control unit that communicates with an external memory device including a secure storage area in which secret data is stored, wherein, the control unit transmits access control information, which is added to the certificate, to the external memory device for confirmation, the secure storage area in the external memory device is divided into a plurality of addressable secret data areas, the access control information includes a first address of one of the plurality of addressable secret data areas of the external memory device, and the control unit (a) receives a response from the external memory device confirming the first address of the access control information added to the certificate, (b) sends a request for secret data of a second address when the first address has been confirmed by the external memory device, and (c) receives secret data of the second address after the external memory device collates the confirmed first address with the second address and determines correspondence therebetween. 6. The host device according to claim 5 , wherein upon receiving confirmation information as the response from the external memory device to the transmitted information in which the access control information is added to certificate, the control unit transmits response information responding to the received confirmation information. 7. The host device according to claim 5 , wherein upon receiving a pseudorandom number as the response from the external memory device, the control unit transmits encrypted information responding to the received pseudorandom number. 8. The host device according to claim 6 , wherein upon receiving an authentication notification, the control unit transmits the second address to the external memory device. 9. A memory system comprising: a host device; and an external memory device that can communicate with the host device, wherein, the host device includes (a) a storage device that stores a certificate issued by at least a certificate authority, and (b) a first control unit that communicates with the external memory device including a secure storage area in which secret data is stored, the first control unit transmits access control information, which is added to the certificate authenticated by the certificate authority, to the external memory device for confirmation, the external memory device includes (a) a storage unit that (i) stores a public key of the certificate authority for verifying the certificate and (ii) includes the secure storage area in which secret data is stored, and (b) a second control unit that controls access to the storage unit based on the access control information that is added to the certificate, transmitted the access control information being received by the external memory device from the host device, the second control unit verifies the certificate using the public key, identifies the access control information, and limits access to the secure storage area in the storage unit, the secure storage area in the storage unit is divided into a plurality of addressable secret data areas, the access control information includes a first address of one of the plurality of addressable secret data areas, and the second control unit confirms the first address of the access control information added to the certificate and collates the confirmed first address of the access control information received from the host device with a second address received from the host device. 10. The memory system according to claim 9 , wherein: upon confirming the first address of the access control information, the second control unit transmits confirmation information, decrypts response information responding to the transmitted confirmation information, and sends an authentication notification to the host device upon confirming correspondence with a value of the transmitted confirmation information, and upon receiving confirmation information as a response to the transmitted information in which the access control information is added to the certificate authenticated by the certificate authority, the first control unit transmits response information responding to the received confirmation information to the external memory device. 11. The memory system according to claim 9 , wherein: upon confirming the first address of the access control information, the second control unit transmits a pseudorandom number, decrypts encrypted information responding to the transmitted pseudorandom number, and sends an authentication notification to the host device upon confirming correspondence with a value of the transmitted pseudorandom number, and upon receiving the pseudorandom number as a response to the transmitted information in which the access control information is added to the certificate authenticated by the certificate authority, the first control unit transmits encrypted information responding to the received pseudorandom number to the external memory device. 12. The memory system according to claim 10 , wherein: upon receiving the authentication notification, the first control unit transmits the second address to the external memory device, and when receiving the second address in response to the authentication notification, the second control unit transmits

Assignees

Inventors

Classifications

  • using challenge-response · CPC title

  • G06F21/79Primary

    in semiconductor storage media, e.g. directly-addressable memories · CPC title

  • involving certificates, e.g. public key certificate [PKC] or attribute certificate [AC]; Public key infrastructure [PKI] arrangements (network architectures or network communication protocols for supporting authentication of entities using certificates in a packet data network H04L63/0823) · CPC title

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What does patent US9053347B2 cover?
A memory device includes: a storage unit that stores public key information of a certificate authority for verifying a certificate and includes a secret area storing data of which secrecy is assured; and a control unit that controls access to the storage unit depending on reception information, wherein the reception information includes information where access control information is added to c…
Who is the assignee on this patent?
Hayashi Takamichi, Kuno Hiroshi, Ebihara Munetake, and 1 more
What technology area does this patent fall under?
Primary CPC classification G06F21/79. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jun 09 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).