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US-2024354038-A1 · Oct 24, 2024 · US
Multi-level interconnect apparatus
US9052880B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9052880-B2 |
| Application number | US-201213449737-A |
| Country | US |
| Kind code | B2 |
| Filing date | Apr 18, 2012 |
| Priority date | Apr 18, 2012 |
| Publication date | Jun 9, 2015 |
| Grant date | Jun 9, 2015 |
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Abstract
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A multi-level interconnect apparatus includes a substrate including a substrate body having a first side and a second side opposite the first side, a processing unit disposed on the second side of the substrate body, a first input/output (I/O) unit disposed on the first side of the substrate body and configured to be electrically communicable with the processing unit along a thickness dimension of the substrate body and a second I/O unit disposed on the second side of the substrate body and configured to be electrically communicable with the processing unit along a planar dimension of the substrate body.
First claim
Opening claim text (preview).
What is claimed is: 1. A multi-level interconnect apparatus, comprising: a substrate including a substrate body having a first side and a second side opposite the first side; a processing unit disposed on and in direct contact with the second side of the substrate body; a first input/output (I/O) unit disposed on and in direct contact with the first side of the substrate body and configured to be electrically communicable with the processing unit via leads disposed to extend a…
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Electricity · mapped topic
Electricity · mapped topic
Physics · mapped topic
- G06F1/20Primary
Physics · mapped topic
Electricity · mapped topic
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- What does patent US9052880B2 cover?
- A multi-level interconnect apparatus includes a substrate including a substrate body having a first side and a second side opposite the first side, a processing unit disposed on the second side of the substrate body, a first input/output (I/O) unit disposed on the first side of the substrate body and configured to be electrically communicable with the processing unit along a thickness dimension…
- Who is the assignee on this patent?
- Becker Wiren D, Becker Alan F, Brodsky William L, and 2 more
- What technology area does this patent fall under?
- Primary CPC classification G06F1/20. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Jun 09 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).