Receiver interface

US9049067B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9049067-B2
Application numberUS-201213550162-A
CountryUS
Kind codeB2
Filing dateJul 16, 2012
Priority dateJul 16, 2012
Publication dateJun 2, 2015
Grant dateJun 2, 2015

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

In an embodiment, a circuit may include an input node, an output node, an internal node, a compensation circuit, and an adjustable capacitance circuit. The compensation circuit may be configured to modify a return loss of a signal received at the input node. The compensation circuit may include a first inductive element, a second inductive element, and a capacitive element. The first inductive element may couple the input node and the output node. The second inductive element may couple the output node and the internal node. The capacitive element may couple the input node and the internal node. The adjustable capacitance circuit may be configured to adjustably modify the return loss of the signal received at the input node. The capacitance circuit may be coupled to the compensation circuit.

First claim

Opening claim text (preview).

What is claimed is: 1. A circuit comprising: an input node; an output node; an internal node; a compensation circuit configured to modify a return loss of a signal received at the input node, the compensation circuit including: a first inductive element coupling the input node and the output node, a second inductive element coupling the output node and the internal node, and a fixed capacitive element coupling the input node and the internal node; and an adjustable…

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Frequently asked questions

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What does patent US9049067B2 cover?
In an embodiment, a circuit may include an input node, an output node, an internal node, a compensation circuit, and an adjustable capacitance circuit. The compensation circuit may be configured to modify a return loss of a signal received at the input node. The compensation circuit may include a first inductive element, a second inductive element, and a capacitive element. The first inductive …
Who is the assignee on this patent?
Jiang Jian Hong, Fujitsu Ltd
What technology area does this patent fall under?
Primary CPC classification H04L25/028. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jun 02 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).