Semiconductor device

Patent metadata

Field	Value
Publication number	US-9048825-B2
Application number	US-201414211426-A
Country	US
Kind code	B2
Filing date	Mar 14, 2014
Priority date	May 20, 2011
Publication date	Jun 2, 2015
Grant date	Jun 2, 2015

Abstract

An object of one embodiment of the present invention to provide a latch circuit includes a level shifter and a buffer in which transistors each including a channel region formed in an oxide semiconductor film are connected in series. Thus, data can be held in the latch circuit even when power is not supplied.

First claim

What is claimed is:

1. A semiconductor device comprising:
a level shifter;
a first buffer; and
a second buffer,
wherein the first buffer comprises a first transistor and a second transistor connected in series,
wherein the second buffer comprises a third transistor and a fourth transistor connected in series,
wherein the level shifter comprises a fifth transistor, a sixth transistor, and a seventh transistor connected in series and an eighth transistor, a ninth transisto…

Assignees

• Semiconductor Energy Lab

Inventors

• Nishijima Tatsuji

Classifications

• H10D84/856

  Electricity · mapped topic

• H10D88/00

  Electricity · mapped topic

• H10D84/08

  Electricity · mapped topic

• H03K19/018507

  Electricity · mapped topic

• G11C19/28

  Physics · mapped topic