Oscillation circuit, voltage controlled oscillator, and serial data receiver
US-2016344378-A1 · Nov 24, 2016 · US
Single ended ring oscillator with fully differential signal
US9048822B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9048822-B2 |
| Application number | US-201414158034-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jan 17, 2014 |
| Priority date | Jan 25, 2013 |
| Publication date | Jun 2, 2015 |
| Grant date | Jun 2, 2015 |
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Abstract
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A single-ended ring oscillation device for generating a fully differential signal is provided. The single-ended oscillation device includes a single-ended ring oscillator and a phase processing unit. The single-ended ring oscillator includes an odd number of inverting delay units. The inverting delay units sequentially generate a first signal, a second signal and a third signal. The phase processing unit generates an intermediate signal according to the first signal and the third signal, and outputs the intermediate signal and a delayed version of the second signal as a fully differential signal. The intermediate signal and the second signal are opposite to each other in phase.
First claim
Opening claim text (preview).
What is claimed is: 1. A single-ended oscillation device for generating a fully differential signal, comprising: a single-ended ring oscillator comprising an odd number of inverting delay units, the inverting delay units sequentially generating a first signal, a second signal and a third signal; and a phase processing unit for generating an intermediate signal according to the first signal and the third signal and outputting the intermediate signal and the second signal as the f…
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- H03K3/0322Primary
Electricity · mapped topic
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- What does patent US9048822B2 cover?
- A single-ended ring oscillation device for generating a fully differential signal is provided. The single-ended oscillation device includes a single-ended ring oscillator and a phase processing unit. The single-ended ring oscillator includes an odd number of inverting delay units. The inverting delay units sequentially generate a first signal, a second signal and a third signal. The phase proce…
- Who is the assignee on this patent?
- Realtek Semiconductor Corp
- What technology area does this patent fall under?
- Primary CPC classification H03K3/0322. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Jun 02 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).