All-tungsten scheme for source/drain contact, source/drain via, and gate via
US-2024395618-A1 · Nov 28, 2024 · US
Method to fabricate copper wiring structures and structures formed thereby
US9048296B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9048296-B2 |
| Application number | US-201113025322-A |
| Country | US |
| Kind code | B2 |
| Filing date | Feb 11, 2011 |
| Priority date | Feb 11, 2011 |
| Publication date | Jun 2, 2015 |
| Grant date | Jun 2, 2015 |
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Abstract
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Techniques formation of high purity copper (Cu)-filled lines and vias are provided. In one aspect, a method of fabricating lines and vias filled with high purity copper with is provided. The method includes the following steps. A via is etched in a dielectric. The via is lined with a diffusion barrier. A thin ruthenium (Ru) layer is conformally deposited onto the diffusion barrier. A Cu layer is deposited on the Ru layer by a sputtering process. A reflow anneal is performed to eliminate voids in the lines and vias.
First claim
Opening claim text (preview).
What is claimed is: 1. A method of fabricating a wiring structure comprising etching an opening into a dielectric layer; lining said opening with a diffusion barrier; depositing a conformal ruthenium layer onto said diffusion barrier; depositing a copper layer onto said ruthenium layer by sputter deposition, wherein said copper layer comprises a first portion completely filling a bottom portion of said opening and a second portion completely filling an upper portion of said…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
- H10W20/425Primary
Electricity · mapped topic
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- What does patent US9048296B2 cover?
- Techniques formation of high purity copper (Cu)-filled lines and vias are provided. In one aspect, a method of fabricating lines and vias filled with high purity copper with is provided. The method includes the following steps. A via is etched in a dielectric. The via is lined with a diffusion barrier. A thin ruthenium (Ru) layer is conformally deposited onto the diffusion barrier. A Cu layer i…
- Who is the assignee on this patent?
- Mcfeely Fenton Read, Yang Chih-Chao, IBM
- What technology area does this patent fall under?
- Primary CPC classification H10W20/425. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Jun 02 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).