Semiconductor die, semiconductor package and substrate dicing method
US-2024421000-A1 · Dec 19, 2024 · US
Die seal ring and method of forming the same
US9048246B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9048246-B2 |
| Application number | US-201313921174-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jun 18, 2013 |
| Priority date | Jun 18, 2013 |
| Publication date | Jun 2, 2015 |
| Grant date | Jun 2, 2015 |
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- Title
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Abstract
Official abstract text for this publication.
A die seal ring is provided. The die seal ring includes a substrate and a first layer extruding from the substrate. The first layer has a first fin ring structure and a layout of the first fin ring structure has a stamp-like shape. In addition, a method for forming a die seal ring is provided. A substrate having an active region is provided. A patterned sacrificial layer is formed on the substrate. A spacer is formed on the sidewall of the patterned sacrificial layer. The patterned sacrificial layer is removed. The substrate is patterned by using the spacer as a mask, thereby simultaneously forming at least a fin structure of a Fin-FET and a first layer of the die seal ring.
First claim
Opening claim text (preview).
What is claimed is: 1. A die seal ring, comprising: a substrate; and a first layer in contact with and extruding from an uppermost surface of the substrate, wherein the first layer has a first fin ring structure and a layout of the first fin ring structure has a stamp-like shape, wherein the first layer comprises a same semiconductor material as the substrate. 2. The die seal ring according to claim 1 , wherein the first layer has a multi-number of fin rin…
Assignees
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
- H10W42/121Primary
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US9048246B2 cover?
- A die seal ring is provided. The die seal ring includes a substrate and a first layer extruding from the substrate. The first layer has a first fin ring structure and a layout of the first fin ring structure has a stamp-like shape. In addition, a method for forming a die seal ring is provided. A substrate having an active region is provided. A patterned sacrificial layer is formed on the substr…
- Who is the assignee on this patent?
- United Microelectronics Corp
- What technology area does this patent fall under?
- Primary CPC classification H10W42/121. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Jun 02 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).