Package with integrated pre-match circuit and harmonic suppression

US9048232B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9048232-B2
Application numberUS-201213459879-A
CountryUS
Kind codeB2
Filing dateApr 30, 2012
Priority dateApr 30, 2012
Publication dateJun 2, 2015
Grant dateJun 2, 2015

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A package is connected at a first side to a printed circuit board and with a die fixed to it on a second side opposite to the first side. The package has an integrated pre-match circuit to provide an impedance match for a signal to be sent to a circuit external to the package. The signal has a predetermined main frequency component. The pre-match circuit has a pair of transmission lines and a pair of stubs on a predetermined layer of the package and connected to the pair of transmission lines. The pair of stubs have a length such as to form a short circuit for an harmonic frequency of the main frequency component in the signal.

First claim

Opening claim text (preview).

What is claimed is: 1. A package having an integrated pre-match circuit, comprising: a connection at a first side of said package to a printed circuit board; a die fixed to said package on a second side opposite to said first side; and said integrated pre-match circuit constituting an impedance match for a signal sent to a circuit external to said package, wherein said signal has a predetermined main frequency component, said pre-match circuit comprising: a pair of transmissi…

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What does patent US9048232B2 cover?
A package is connected at a first side to a printed circuit board and with a die fixed to it on a second side opposite to the first side. The package has an integrated pre-match circuit to provide an impedance match for a signal to be sent to a circuit external to the package. The signal has a predetermined main frequency component. The pre-match circuit has a pair of transmission lines and a p…
Who is the assignee on this patent?
Colussi Laurentius Cornelis, Willms Johannes Geradus, Dialog Semiconductor Bv
What technology area does this patent fall under?
Primary CPC classification H10W70/685. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jun 02 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).