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Sacrificial wafer probe pads through seal ring for electrical connection to circuit inside an integrated circuit
US9048201B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9048201-B2 |
| Application number | US-201113167152-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jun 23, 2011 |
| Priority date | Jun 23, 2011 |
| Publication date | Jun 2, 2015 |
| Grant date | Jun 2, 2015 |
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- Title
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Abstract
Official abstract text for this publication.
The disclosure is directed to a semiconductor wafer, integrated circuit product, and method of making same, having multiple non-singulated chips separated by scribe lines, comprising a plurality of seal rings, each seal ring surrounding a corresponding chip and disposed between the corresponding chip and adjacent scribe lines. Well resistors are disposed below the seal rings and probe pads disposed in the scribe lines. In particular, at least one of the probe pads is coupled by at least one of the well resistors to at least one of the chips.
First claim
Opening claim text (preview).
What is claimed is: 1. A semiconductor wafer having multiple non-singulated chips separated by scribe lines, comprising: a plurality of seal rings disposed on a surface of a semiconductor substrate, each seal ring surrounding a corresponding chip and disposed between the corresponding chip and adjacent scribe lines; probe pads disposed in the scribe lines; and a plurality of doped regions disposed in the semiconductor substrate, each of the plurality of doped regions configure…
Assignees
Inventors
Classifications
Electricity · mapped topic
- H10P74/273Primary
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
- H01L22/32Primary
Electricity · mapped topic
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Frequently asked questions
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- What does patent US9048201B2 cover?
- The disclosure is directed to a semiconductor wafer, integrated circuit product, and method of making same, having multiple non-singulated chips separated by scribe lines, comprising a plurality of seal rings, each seal ring surrounding a corresponding chip and disposed between the corresponding chip and adjacent scribe lines. Well resistors are disposed below the seal rings and probe pads disp…
- Who is the assignee on this patent?
- Hui Frank, Kistler Neal, Bautista Don, and 1 more
- What technology area does this patent fall under?
- Primary CPC classification H10P74/273. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Jun 02 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).