Programming environment for executing program code despite errors and for providing error indicators

US9047411B1 · US · B1

Patent metadata
FieldValue
Publication numberUS-9047411-B1
Application numberUS-201314068263-A
CountryUS
Kind codeB1
Filing dateOct 31, 2013
Priority dateOct 22, 2013
Publication dateJun 2, 2015
Grant dateJun 2, 2015

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A device may receive an indication to evaluate a first portion of program code and a second portion of program code provided via a user interface. The first portion of program code may include an error. The device may cause the first and second portions of program code to be evaluated based on receiving the indication to evaluate the first and second portions of program code. The second portion of program code may be evaluated after the first portion of program code. The device may generate a first result corresponding to the first portion of program code and a second result corresponding to the second portion of program code. The first result may include an error indicator. The device may provide the first result and the second result via the user interface.

First claim

Opening claim text (preview).

What is claimed is: 1. A device, comprising: one or more processors to: receive an indication to evaluate a plurality of portions of program code provided in a first portion of a user interface; cause a first portion of program code, of the plurality of portions of program code, to be evaluated for debugging purposes, based on receiving the indication to evaluate the plurality of portions of program code; determine a corresponding error, associated with the first portion of program code, based on causing the first portion of program code to be evaluated; provide an error indicator, that identifies the corresponding error, in a second portion of the user interface based on determining the error, the second portion of the user interface being different from the first portion of the user interface; cause a second portion of program code, of the plurality of portions of program code, to be evaluated, the second portion of program code being evaluated after determining the error associated with the first portion of program code; determine a result, associated with the second portion of program code, based on causing the second portion of program code to be evaluated; and provide the result for display based on determining the result. 2. The device of claim 1 , where the one or more processors are further to: provide suggested program code associated with the first portion of program code; provide a valid result of evaluating the suggested portion of program code; receive input identifying the suggested portion of program code or the valid result; and replace, in the first portion of the user interface, the first portion of program code with the suggested portion of program code based on the input identifying the suggested portion of program code or the valid result. 3. The device of claim 1 , where the one or more processors, when determining the result, are further to: determine an error-free result based on causing the second portion of program code to be evaluated; and where the one or more processors, when providing the result, are further to: provide the error-free result based on determining the error-free result. 4. The device of claim 1 , where the one or more processors, when determining the result, are further to: determine an independent error associated with the second portion of program code based on causing the second portion of program code to be evaluated, the independent error being independent of the corresponding error and the first portion of program code; and where the one or more processors, when providing the result, are further to: provide another error indicator that identifies the independent error. 5. The device of claim 4 , where the one or more processors are further to: receive a selection of the first portion of program code; provide a first correspondence indicator that indicates a correspondence between the error indicator and the first portion of program code based on receiving the selection of the first portion of program code; provide a second correspondence indicator that indicates a correspondence between the other error indicator and the second portion of program code based on receiving the selection of the first portion of program code, the second correspondence indicator being different from the first correspondence indicator. 6. The device of claim 1 , where the one or more processors, when determining the result, are further to: determine a dependent error associated with the second portion of program code based on causing the second portion of program code to be evaluated, the dependent error being dependent on the corresponding error or the first portion of program code; and where the one or more processors, when providing the result, are further to: provide another error indicator that identifies the dependent error. 7. The device of claim 6 , where the one or more processors are further to: receive a selection of the first portion of program code; and provide a correspondence indicator that indicates a correspondence between the error indicator, the other error indicator, and the first portion of program code based on receiving the selection of the first portion of program code. 8. A computer-readable medium storing instructions, the instructions comprising: one or more instructions that, when executed by one or more processors, cause the one or more processors to: receive an indication to evaluate a first portion of program code and a second portion of program code provided via a user interface, the first portion of program code including an error; cause the first portion of program code to be evaluated, to determine a first result, based on receiving the indication, the first result including an error indicator associated with the error; cause the second portion of program code to be evaluated, to determine a second result, based on receiving the indication, the second portion of program code being evaluated after the first portion of program code is evaluated; and provide the first result, including the error indicator, and the second result via the user interface. 9. The computer-readable medium of claim 8 , where the first portion of program code and the second portion of program code are provided in a first section of the user interface; and where the one or more instructions, that cause the one or more processors to provide the first result and the second result, further cause the one or more processors to: provide the first result and the second result in a second section of the user interface, the second section being separate from the first section. 10. The computer-readable medium of claim 8 , where the error indicator is a first error indicator, and where the second result includes a second error indicator; and where the one or more instructions, when executed by the one or more processors, further cause the one or more processors to: determine that the second portion of program code depends from the first portion of program code; and provide a correspondence indicator that indicates a correspondence between the first portion of program code, the first error indicator, and the second error indicator based on determining that the second portion of program code depends from the first portion of program code. 11. The computer-readable medium of claim 8 , where the error indicator is a first error indicator, and where the second result includes a second error indicator; and where the one or more instructions, when executed by the one or more processors, further cause the one or more processors to: determine that the first portion of program code is associated with a first error type; determine that the second portion of program code is associated with a second error type that is different from the first error type; provide a first correspondence indicator that indicates a correspondence between the first portion of program code and the first error indicator; and provide a second correspondence indicator that indicates a correspondence between the second portion of program code and the second error indicator based on determining that the second portion of program code is associated with a second error type that is different from the first error type, the second correspondence indicator being different from the first correspondence indicator. 12. The computer-readable medium of claim 8 , where the second result includes an error-free result; and where the one or more instructions, when executed by the one or more processors, further cause the one or more processors to: receive an indication to hide error-free results; and hide t

Assignees

Inventors

Classifications

  • Environments for analysis, debugging or testing of software · CPC title

  • Physics · mapped topic

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Frequently asked questions

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What does patent US9047411B1 cover?
A device may receive an indication to evaluate a first portion of program code and a second portion of program code provided via a user interface. The first portion of program code may include an error. The device may cause the first and second portions of program code to be evaluated based on receiving the indication to evaluate the first and second portions of program code. The second portion…
Who is the assignee on this patent?
Mathworks Inc
What technology area does this patent fall under?
Primary CPC classification G06F11/3698. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jun 02 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).