Semiconductor device and method for forming the same
US-2024395669-A1 · Nov 28, 2024 · US
Sidewalls of electroplated copper interconnects
US9040407B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9040407-B2 |
| Application number | US-201314043079-A |
| Country | US |
| Kind code | B2 |
| Filing date | Oct 1, 2013 |
| Priority date | Jun 18, 2012 |
| Publication date | May 26, 2015 |
| Grant date | May 26, 2015 |
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Abstract
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A method including depositing an alloying layer along a sidewall of an opening and in direct contact with a seed layer, the alloying layer includes a crystalline structure that cannot serve as a seed for plating a conductive material, exposing the opening to an electroplating solution including the conductive material, the conductive material is not present in the alloying layer, applying an electrical potential to a cathode causing the conductive material to deposit from the electroplating solution onto the cathode exposed at the bottom of the opening and causing the opening to fill with the conductive material, the cathode includes an exposed portion of the seed layer and excludes the alloying layer, and forming a first intermetallic compound along an intersection between the alloying layer and the conductive material, the first intermetallic compound is formed as a precipitate within a solid solution of the alloying layer and the conductive material.
First claim
Opening claim text (preview).
What is claimed is: 1. A method of plating a structure comprising an opening etched in a nonmetallic material and a diffusion barrier deposited along a sidewall and along a bottom of the opening, the method comprising: depositing a seed layer along the sidewall and the bottom of the opening in direct contact with the diffusion barrier, wherein the seed layer comprises a crystalline structure suitable for plating copper; depositing an alloying layer along the sidewall of the open…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US9040407B2 cover?
- A method including depositing an alloying layer along a sidewall of an opening and in direct contact with a seed layer, the alloying layer includes a crystalline structure that cannot serve as a seed for plating a conductive material, exposing the opening to an electroplating solution including the conductive material, the conductive material is not present in the alloying layer, applying an el…
- Who is the assignee on this patent?
- IBM
- What technology area does this patent fall under?
- Primary CPC classification H10W20/20. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue May 26 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).