Memory performance evaluation using address mapping information
US-2024394164-A1 · Nov 28, 2024 · US
Flash memory management method and flash memory controller and storage system using the same
US9037814B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9037814-B2 |
| Application number | US-69752510-A |
| Country | US |
| Kind code | B2 |
| Filing date | Feb 1, 2010 |
| Priority date | Dec 15, 2009 |
| Publication date | May 19, 2015 |
| Grant date | May 19, 2015 |
How to read this patent
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
- Title
What the patent document calls the invention.
- Abstract
A short plain-language summary of the technical disclosure.
- Assignees and inventors
Who owns or filed the patent and who is credited as inventor.
- Key dates
Filing, priority, publication, and grant dates set the timeline.
- First independent claim
The legal scope of protection — read this for what is actually claimed.
- CPC / IPC classifications
Technology tags used to group this patent with similar filings.
- Citations and related patents
Prior art links and similar publications in this corpus.
Abstract
Official abstract text for this publication.
A flash memory management method for managing a plurality of physical units of a flash memory chip is provided. The flash memory management method includes grouping a portion of the physical units into a data area and a spare area; configuring a plurality of logical units and setting mapping relationships between the logical units and the physical units of the data area. The flash memory management method further includes receiving data and writing the data into the physical unit mapped to a second logical unit among the logical units, and the data belongs to a first logical unit among logical units. Accordingly, the flash memory management method can effectively reduce the number of times for organizing valid data, thereby reducing the time for executing a host write-in command.
First claim
Opening claim text (preview).
What is claimed is: 1. A flash memory management method, for managing a plurality of physical units of a flash memory chip, the flash memory management method comprising: at least grouping a portion of the physical units into a data area and a spare area; configuring a plurality of logical units; setting mapping relationships between the logical units and the physical units of the data area, wherein each of the logical units maps one of the physical units in the data area and…
Assignees
Inventors
Classifications
Physics · mapped topic
Physics · mapped topic
- G06F12/0246Primary
Physics · mapped topic
Patent family
Related publications grouped by family.
External sources
Next steps
Free tools are coming soon. Tell us what you want to track and we'll notify you.
Frequently asked questions
Answers are generated from the same data shown on this page.
- What does patent US9037814B2 cover?
- A flash memory management method for managing a plurality of physical units of a flash memory chip is provided. The flash memory management method includes grouping a portion of the physical units into a data area and a spare area; configuring a plurality of logical units and setting mapping relationships between the logical units and the physical units of the data area. The flash memory manage…
- Who is the assignee on this patent?
- Yeh Chih-Kang, Phison Electronics Corp
- What technology area does this patent fall under?
- Primary CPC classification G06F12/0246. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue May 19 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).