Multilayer chip capacitor and method of fabricating the same

US9036330B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9036330-B2
Application numberUS-65013409-A
CountryUS
Kind codeB2
Filing dateDec 30, 2009
Priority dateMar 17, 2009
Publication dateMay 19, 2015
Grant dateMay 19, 2015

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  2. Abstract

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  5. First independent claim

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Abstract

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A multilayer chip capacitor includes: a capacitor main body; a plurality of first and second inner electrodes; and m (m≧3) number of first and second outer electrodes. The plurality of first and second inner electrodes are connected with two outer electrodes positioned on both opposing surfaces and having the same polarity as that of the first and second inner electrodes, and classified into a plurality of groups depending on the locations of the outer electrodes connected to the first and second inner electrodes. At least one of two outer electrodes connected with inner electrodes of each group is different from an outer electrode connected with inner electrodes of a different group having the same polarity, and inner electrodes of one group are connected to outer electrodes connected with at least another one group so that all the inner electrodes belonging to the same polarity can be electrically connected.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for fabricating a multilayer chip capacitor assembly, the method comprising: providing the multilayer chip capacitor; selecting a first portion of the first outer electrodes to be directly connected to a power source among the first outer electrodes of the multilayer chip capacitor and excluding a second portion of the first outer electrodes from being directly connected to the power source, in order to obtain a desired equivalent series resistanc…

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What does patent US9036330B2 cover?
A multilayer chip capacitor includes: a capacitor main body; a plurality of first and second inner electrodes; and m (m≧3) number of first and second outer electrodes. The plurality of first and second inner electrodes are connected with two outer electrodes positioned on both opposing surfaces and having the same polarity as that of the first and second inner electrodes, and classified into a …
Who is the assignee on this patent?
Lee Byoung Hwa, Wi Sung Kwon, Chung Hae Suk, and 4 more
What technology area does this patent fall under?
Primary CPC classification H01G4/232. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue May 19 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).