System and method for dictionary-based cache-line level code compression for on-chip memories using gradual bit removal
US-2015381201-A1 · Dec 31, 2015 · US
Optimizing compression engine throughput via run pre-processing
US9035809B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9035809-B2 |
| Application number | US-201213651655-A |
| Country | US |
| Kind code | B2 |
| Filing date | Oct 15, 2012 |
| Priority date | Oct 15, 2012 |
| Publication date | May 19, 2015 |
| Grant date | May 19, 2015 |
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Abstract
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An apparatus includes a first circuit and a second circuit. The first circuit may be configured to generate a reduced representation of an input sequence of characters by replacing a repetition of a sequence of one or more characters by a code representing the repetition of the sequence of one or more characters. The second circuit may be configured to generate a compressed representation of the input sequence of characters in response to the reduced representation of the input sequence of characters. The second circuit is generally configured to recognize the code representing the repetition of the sequence of one or more characters and take into account the repetition of the sequence of one or more characters during a compression operation.
First claim
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The invention claimed is: 1. An apparatus comprising: a first circuit configured to generate a reduced representation of an input sequence of characters by replacing a portion of the input sequence of characters containing a repetition of a sequence of one or more characters by a code representing the repetition of the sequence of one or more characters; and a second circuit configured to generate a compressed representation of the input sequence of characters using the reduced…
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- H03M7/3086Primary
Electricity · mapped topic
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- What does patent US9035809B2 cover?
- An apparatus includes a first circuit and a second circuit. The first circuit may be configured to generate a reduced representation of an input sequence of characters by replacing a repetition of a sequence of one or more characters by a code representing the repetition of the sequence of one or more characters. The second circuit may be configured to generate a compressed representation of th…
- Who is the assignee on this patent?
- Seagate Technology Llc
- What technology area does this patent fall under?
- Primary CPC classification H03M7/3086. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue May 19 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).